Searched refs:APBC_PWM2 (Results 1 – 6 of 6) sorted by relevance
| /linux-6.1.9/drivers/clk/mmp/ |
| D | clk-of-pxa168.c | 27 #define APBC_PWM2 0x14 macro
166 …{0, "pwm2_mux", pwm_parent_names, ARRAY_SIZE(pwm_parent_names), CLK_SET_RATE_PARENT, APBC_PWM2, 4,…
187 …{PXA168_CLK_PWM2, "pwm2_clk", "pwm2_mux", CLK_SET_RATE_PARENT, APBC_PWM2, 0x3, 0x3, 0x0, 0, &pwm2_…
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| D | clk-of-pxa910.c | 30 #define APBC_PWM2 0x14 macro
145 …{PXA910_CLK_PWM2, "pwm2_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM2, 0x3, 0x3, 0x0, 0, &reset_…
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| D | clk-pxa910.c | 28 #define APBC_PWM2 0x14 macro
195 apbc_base + APBC_PWM2, 10, 0, &clk_lock); in pxa910_clk_init()
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| D | clk-pxa168.c | 28 #define APBC_PWM2 0x14 macro
190 apbc_base + APBC_PWM2, 10, 0, &clk_lock); in pxa168_clk_init()
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| D | clk-mmp2.c | 35 #define APBC_PWM2 0x44 macro
235 apbc_base + APBC_PWM2, 10, 0, &clk_lock); in mmp2_clk_init()
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| D | clk-of-mmp2.c | 41 #define APBC_PWM2 0x44 macro
260 …{MMP2_CLK_PWM2, "pwm2_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM2, 0x7, 0x3, 0x0, 0, &reset_lo…
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