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Searched refs:smu_cmn_feature_is_enabled (Results 1 – 15 of 15) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/pm/swsmu/smu13/
Daldebaran_ppt.c310 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in aldebaran_set_default_dpm_table()
326 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in aldebaran_set_default_dpm_table()
345 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in aldebaran_set_default_dpm_table()
361 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) { in aldebaran_set_default_dpm_table()
691 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) in aldebaran_get_current_clk_freq_by_table()
697 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) in aldebaran_get_current_clk_freq_by_table()
703 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) in aldebaran_get_current_clk_freq_by_table()
709 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) in aldebaran_get_current_clk_freq_by_table()
715 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) in aldebaran_get_current_clk_freq_by_table()
946 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT) && in aldebaran_upload_dpm_level()
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Dsmu_v13_0.c892 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT) && in smu_v13_0_notify_display_change()
950 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v13_0_init_max_sustainable_clocks()
961 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in smu_v13_0_init_max_sustainable_clocks()
972 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in smu_v13_0_init_max_sustainable_clocks()
1020 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) in smu_v13_0_get_current_power_limit()
1050 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) { in smu_v13_0_set_power_limit()
1113 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) || in smu_v13_0_display_clock_voltage_request()
1114 smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v13_0_display_clock_voltage_request()
1155 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_FAN_CONTROL_BIT)) in smu_v13_0_get_fan_control_mode()
2232 !smu_cmn_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT)) in smu_v13_0_baco_is_support()
Dsmu_v13_0_7_ppt.c530 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table()
546 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table()
562 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table()
578 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table()
594 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_VCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table()
610 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table()
1570 .feature_is_enabled = smu_cmn_feature_is_enabled,
Dsmu_v13_0_0_ppt.c507 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table()
523 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table()
539 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table()
555 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table()
571 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_VCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table()
587 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table()
1604 .feature_is_enabled = smu_cmn_feature_is_enabled,
Dsmu_v13_0_5_ppt.c703 return smu_cmn_feature_is_enabled(smu, feature_id); in smu_v13_0_5_clk_dpm_is_enabled()
Dsmu_v13_0_4_ppt.c724 return smu_cmn_feature_is_enabled(smu, feature_id); in smu_v13_0_4_clk_dpm_is_enabled()
Dyellow_carp_ppt.c811 return smu_cmn_feature_is_enabled(smu, feature_id); in yellow_carp_clk_dpm_is_enabled()
/linux-5.19.10/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dnavi10_ppt.c971 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in navi10_set_default_dpm_table()
989 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in navi10_set_default_dpm_table()
1007 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in navi10_set_default_dpm_table()
1025 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) { in navi10_set_default_dpm_table()
1043 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) { in navi10_set_default_dpm_table()
1061 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in navi10_set_default_dpm_table()
1079 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in navi10_set_default_dpm_table()
1097 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in navi10_set_default_dpm_table()
1115 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in navi10_set_default_dpm_table()
1140 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) { in navi10_dpm_set_vcn_enable()
[all …]
Darcturus_ppt.c336 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in arcturus_set_default_dpm_table()
354 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in arcturus_set_default_dpm_table()
372 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in arcturus_set_default_dpm_table()
390 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) { in arcturus_set_default_dpm_table()
718 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) in arcturus_get_current_clk_freq_by_table()
724 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) in arcturus_get_current_clk_freq_by_table()
730 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) in arcturus_get_current_clk_freq_by_table()
736 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_DPM_BIT)) in arcturus_get_current_clk_freq_by_table()
742 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_DPM_BIT)) in arcturus_get_current_clk_freq_by_table()
956 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT) && in arcturus_upload_dpm_level()
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Dsmu_v11_0.c811 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT) && in smu_v11_0_notify_display_change()
869 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v11_0_init_max_sustainable_clocks()
880 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in smu_v11_0_init_max_sustainable_clocks()
891 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in smu_v11_0_init_max_sustainable_clocks()
939 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) in smu_v11_0_get_current_power_limit()
975 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) { in smu_v11_0_set_power_limit()
1019 smu_cmn_feature_is_enabled(smu, SMU_FEATURE_ACDC_BIT)) in smu_v11_0_process_pending_interrupt()
1087 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) || in smu_v11_0_display_clock_voltage_request()
1088 smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v11_0_display_clock_voltage_request()
1158 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_FAN_CONTROL_BIT)) in smu_v11_0_get_fan_control_mode()
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Dsienna_cichlid_ppt.c915 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in sienna_cichlid_set_default_dpm_table()
933 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in sienna_cichlid_set_default_dpm_table()
951 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in sienna_cichlid_set_default_dpm_table()
969 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) { in sienna_cichlid_set_default_dpm_table()
991 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_MM_DPM_PG_BIT)) { in sienna_cichlid_set_default_dpm_table()
1013 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_MM_DPM_PG_BIT)) { in sienna_cichlid_set_default_dpm_table()
1032 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in sienna_cichlid_set_default_dpm_table()
1050 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in sienna_cichlid_set_default_dpm_table()
1068 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in sienna_cichlid_set_default_dpm_table()
1086 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in sienna_cichlid_set_default_dpm_table()
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Dvangogh_ppt.c889 if (!smu_cmn_feature_is_enabled(smu, feature_id)) in vangogh_clk_dpm_is_enabled()
1324 if (!smu_cmn_feature_is_enabled(smu, clk_feature_map[i].feature)) in vangogh_unforce_dpm_levels()
1989 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT) && in vangogh_post_smu_init()
2125 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) { in vangogh_set_power_limit()
2193 .feature_is_enabled = smu_cmn_feature_is_enabled,
/linux-5.19.10/drivers/gpu/drm/amd/pm/swsmu/
Dsmu_cmn.h54 int smu_cmn_feature_is_enabled(struct smu_context *smu,
Dsmu_cmn.c538 int smu_cmn_feature_is_enabled(struct smu_context *smu, in smu_cmn_feature_is_enabled() function
599 if (!smu_cmn_feature_is_enabled(smu, feature_id)) in smu_cmn_clk_dpm_is_enabled()
/linux-5.19.10/drivers/gpu/drm/amd/pm/swsmu/smu12/
Drenoir_ppt.c646 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) { in renoir_dpm_set_vcn_enable()
652 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) { in renoir_dpm_set_vcn_enable()
667 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_JPEG_PG_BIT)) { in renoir_dpm_set_jpeg_enable()
673 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_JPEG_PG_BIT)) { in renoir_dpm_set_jpeg_enable()
726 if (!smu_cmn_feature_is_enabled(smu, clk_feature_map[i].feature)) in renoir_unforce_dpm_levels()
1432 .feature_is_enabled = smu_cmn_feature_is_enabled,