| /linux-5.19.10/drivers/media/spi/ |
| D | gs1662.c | 54 u16 reg_value; member
59 u16 reg_value; member
235 if (reg_fmt[i].reg_value == std) { in gs_status_format()
251 return reg_fmt[i].reg_value | MASK_FORCE_STD; in get_register_timings()
266 int reg_value; in gs_s_dv_timings() local
268 reg_value = get_register_timings(timings); in gs_s_dv_timings()
269 if (reg_value == 0x0) in gs_s_dv_timings()
290 u16 reg_value, i; in gs_query_dv_timings() local
301 gs_read_register(gs->pdev, REG_LINES_PER_FRAME + i, ®_value); in gs_query_dv_timings()
302 if (reg_value) in gs_query_dv_timings()
[all …]
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| /linux-5.19.10/drivers/gpu/drm/amd/display/dc/ |
| D | dm_services.h | 88 uint32_t reg_value, in get_reg_field_value_ex() argument
92 return (mask & reg_value) >> shift; in get_reg_field_value_ex()
95 #define get_reg_field_value(reg_value, reg_name, reg_field)\ argument
97 (reg_value),\
102 uint32_t reg_value, in set_reg_field_value_ex() argument
108 return (reg_value & ~mask) | (mask & (value << shift)); in set_reg_field_value_ex()
111 #define set_reg_field_value(reg_value, value, reg_name, reg_field)\ argument
112 (reg_value) = set_reg_field_value_ex(\
113 (reg_value),\
164 #define get_reg_field_value_soc15(reg_value, block, reg_num, reg_name, reg_field)\ argument
[all …]
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| /linux-5.19.10/drivers/media/dvb-frontends/cxd2880/ |
| D | cxd2880_tnrdmd_dvbt_mon.c | 392 u16 *reg_value) in dvbt_read_snr_reg() argument
397 if (!tnr_dmd || !reg_value) in dvbt_read_snr_reg()
428 *reg_value = (rdata[0] << 8) | rdata[1]; in dvbt_read_snr_reg()
434 u32 reg_value, int *snr) in dvbt_calc_snr() argument
439 if (reg_value == 0) in dvbt_calc_snr()
442 if (reg_value > 4996) in dvbt_calc_snr()
443 reg_value = 4996; in dvbt_calc_snr()
445 *snr = intlog10(reg_value) - intlog10(5350 - reg_value); in dvbt_calc_snr()
454 u16 reg_value = 0; in cxd2880_tnrdmd_dvbt_mon_snr() local
472 ret = dvbt_read_snr_reg(tnr_dmd, ®_value); in cxd2880_tnrdmd_dvbt_mon_snr()
[all …]
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| D | cxd2880_io.c | 49 const struct cxd2880_reg_value reg_value[], in cxd2880_io_write_multi_regs() argument
59 ret = io->write_reg(io, tgt, reg_value[i].addr, in cxd2880_io_write_multi_regs()
60 reg_value[i].value); in cxd2880_io_write_multi_regs()
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| D | cxd2880_tnrdmd_dvbt2_mon.c | 1228 u16 *reg_value) in dvbt2_read_snr_reg() argument
1236 if (!tnr_dmd || !reg_value) in dvbt2_read_snr_reg()
1275 *reg_value = (data[0] << 8) | data[1]; in dvbt2_read_snr_reg()
1281 u32 reg_value, int *snr) in dvbt2_calc_snr() argument
1286 if (reg_value == 0) in dvbt2_calc_snr()
1289 if (reg_value > 10876) in dvbt2_calc_snr()
1290 reg_value = 10876; in dvbt2_calc_snr()
1292 *snr = intlog10(reg_value) - intlog10(12600 - reg_value); in dvbt2_calc_snr()
1301 u16 reg_value = 0; in cxd2880_tnrdmd_dvbt2_mon_snr() local
1319 ret = dvbt2_read_snr_reg(tnr_dmd, ®_value); in cxd2880_tnrdmd_dvbt2_mon_snr()
[all …]
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| /linux-5.19.10/drivers/clk/ |
| D | clk-max9485.c | 36 u8 reg_value; member
80 u8 reg_value; member
96 drvdata->reg_value &= ~mask; in max9485_update_bits()
97 drvdata->reg_value |= value; in max9485_update_bits()
101 mask, value, drvdata->reg_value); in max9485_update_bits()
104 &drvdata->reg_value, in max9485_update_bits()
105 sizeof(drvdata->reg_value)); in max9485_update_bits()
144 entry->reg_value); in max9485_clkout_set_rate()
152 u8 val = drvdata->reg_value & MAX9485_FREQ_MASK; in max9485_clkout_recalc_rate()
156 if (val == entry->reg_value) in max9485_clkout_recalc_rate()
[all …]
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| /linux-5.19.10/drivers/media/dvb-frontends/ |
| D | stv6111.c | 32 u16 reg_value; member
533 int table_size, u16 reg_value) in table_lookup() argument
542 if (reg_value <= table[0].reg_value) { in table_lookup()
544 } else if (reg_value >= table[imax].reg_value) { in table_lookup()
549 if ((table[imin].reg_value <= reg_value) && in table_lookup()
550 (reg_value <= table[i].reg_value)) in table_lookup()
555 reg_diff = table[imax].reg_value - table[imin].reg_value; in table_lookup()
558 gain += ((s32)(reg_value - table[imin].reg_value) * in table_lookup()
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| /linux-5.19.10/sound/soc/mediatek/mt8195/ |
| D | mt8195-dai-pcm.c | 32 unsigned int reg_value; member
43 { .rate = 8000, .reg_value = 0, },
44 { .rate = 16000, .reg_value = 1, },
45 { .rate = 32000, .reg_value = 2, },
46 { .rate = 48000, .reg_value = 3, },
47 { .rate = 11025, .reg_value = 1, },
48 { .rate = 22050, .reg_value = 2, },
49 { .rate = 44100, .reg_value = 3, },
58 return mtk_dai_pcm_rates[i].reg_value; in mtk_dai_pcm_mode()
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| /linux-5.19.10/drivers/gpu/drm/amd/amdgpu/ |
| D | sdma_v4_4.c | 197 uint32_t reg_value = 0; in sdma_v4_4_query_ras_error_count_by_instance() local
201 reg_value = RREG32(reg_offset); in sdma_v4_4_query_ras_error_count_by_instance()
203 if (reg_value) in sdma_v4_4_query_ras_error_count_by_instance()
204 sdma_v4_4_get_ras_error_count(adev, regSDMA0_EDC_COUNTER, reg_value, in sdma_v4_4_query_ras_error_count_by_instance()
208 reg_value = RREG32(reg_offset); in sdma_v4_4_query_ras_error_count_by_instance()
210 if (reg_value) in sdma_v4_4_query_ras_error_count_by_instance()
211 sdma_v4_4_get_ras_error_count(adev, regSDMA0_EDC_COUNTER2, reg_value, in sdma_v4_4_query_ras_error_count_by_instance()
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| D | umc_v6_7.c | 71 uint64_t reg_value; in umc_v6_7_query_error_status_helper() local
82 reg_value = RREG64_PCIE((mc_umc_addr + umc_reg_offset) * 4); in umc_v6_7_query_error_status_helper()
83 if (reg_value) in umc_v6_7_query_error_status_helper()
84 dev_info(adev->dev, "MCA IPID 0x%llx, umc_reg_offset 0x%x\n", reg_value, umc_reg_offset); in umc_v6_7_query_error_status_helper()
89 reg_value = RREG64_PCIE((mc_umc_addr + umc_reg_offset) * 4); in umc_v6_7_query_error_status_helper()
90 if (reg_value) in umc_v6_7_query_error_status_helper()
91 dev_info(adev->dev, "MCA SYND 0x%llx, umc_reg_offset 0x%x\n", reg_value, umc_reg_offset); in umc_v6_7_query_error_status_helper()
96 reg_value = RREG64_PCIE((mc_umc_addr + umc_reg_offset) * 4); in umc_v6_7_query_error_status_helper()
97 if (reg_value) in umc_v6_7_query_error_status_helper()
98 dev_info(adev->dev, "MCA MISC0 0x%llx, umc_reg_offset 0x%x\n", reg_value, umc_reg_offset); in umc_v6_7_query_error_status_helper()
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| D | mmsch_v3_0.h | 66 uint32_t reg_value; member
87 uint32_t reg_value; member
105 direct_wt.reg_value = value; \
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| D | mmsch_v1_0.h | 73 uint32_t reg_value; member
94 uint32_t reg_value; member
103 direct_wt->reg_value = value; in mmsch_v1_0_insert_direct_wt()
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| /linux-5.19.10/drivers/hwtracing/coresight/ |
| D | coresight-cti-core.c | 342 u32 reg_value; in cti_channel_trig_op() local
373 reg_value = direction == CTI_TRIG_IN ? config->ctiinen[trigger_idx] : in cti_channel_trig_op()
376 reg_value |= chan_bitmask; in cti_channel_trig_op()
378 reg_value &= ~chan_bitmask; in cti_channel_trig_op()
382 config->ctiinen[trigger_idx] = reg_value; in cti_channel_trig_op()
384 config->ctiouten[trigger_idx] = reg_value; in cti_channel_trig_op()
388 cti_write_single_reg(drvdata, reg_offset, reg_value); in cti_channel_trig_op()
399 u32 reg_value; in cti_channel_gate_op() local
408 reg_value = config->ctigate; in cti_channel_gate_op()
411 reg_value |= chan_bitmask; in cti_channel_gate_op()
[all …]
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| /linux-5.19.10/drivers/power/supply/ |
| D | ab8500_fg.c | 1844 u8 reg_value; in ab8500_fg_check_hw_failure_work() local
1855 ®_value); in ab8500_fg_check_hw_failure_work()
1860 if ((reg_value & BATT_OVV) == BATT_OVV) { in ab8500_fg_check_hw_failure_work()
2585 u8 reg_value; in ab8505_powercut_flagtime_read() local
2590 AB8505_RTC_PCUT_FLAG_TIME_REG, ®_value); in ab8505_powercut_flagtime_read()
2597 return scnprintf(buf, PAGE_SIZE, "%d\n", (reg_value & 0x7F)); in ab8505_powercut_flagtime_read()
2608 int reg_value; in ab8505_powercut_flagtime_write() local
2612 if (kstrtoint(buf, 10, ®_value)) in ab8505_powercut_flagtime_write()
2615 if (reg_value > 0x7F) { in ab8505_powercut_flagtime_write()
2621 AB8505_RTC_PCUT_FLAG_TIME_REG, (u8)reg_value); in ab8505_powercut_flagtime_write()
[all …]
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| /linux-5.19.10/drivers/net/ethernet/microchip/ |
| D | lan743x_ethtool.c | 30 u32 reg_value; in lan743x_otp_power_up() local
32 reg_value = lan743x_csr_read(adapter, OTP_PWR_DN); in lan743x_otp_power_up()
34 if (reg_value & OTP_PWR_DN_PWRDN_N_) { in lan743x_otp_power_up()
36 reg_value &= ~OTP_PWR_DN_PWRDN_N_; in lan743x_otp_power_up()
37 lan743x_csr_write(adapter, OTP_PWR_DN, reg_value); in lan743x_otp_power_up()
47 u32 reg_value; in lan743x_otp_power_down() local
49 reg_value = lan743x_csr_read(adapter, OTP_PWR_DN); in lan743x_otp_power_down()
50 if (!(reg_value & OTP_PWR_DN_PWRDN_N_)) { in lan743x_otp_power_down()
52 reg_value |= OTP_PWR_DN_PWRDN_N_; in lan743x_otp_power_down()
53 lan743x_csr_write(adapter, OTP_PWR_DN, reg_value); in lan743x_otp_power_down()
[all …]
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| /linux-5.19.10/drivers/phy/allwinner/ |
| D | phy-sun9i-usb.c | 46 u32 bits, reg_value; in sun9i_usb_phy_passby() local
56 reg_value = readl(phy->pmu); in sun9i_usb_phy_passby()
59 reg_value |= bits; in sun9i_usb_phy_passby()
61 reg_value &= ~bits; in sun9i_usb_phy_passby()
63 writel(reg_value, phy->pmu); in sun9i_usb_phy_passby()
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| /linux-5.19.10/drivers/ata/ |
| D | ahci_imx.c | 818 struct reg_value { struct
820 u32 reg_value; argument
825 const struct reg_value *values;
831 static const struct reg_value gpr13_tx_level[] = {
866 static const struct reg_value gpr13_tx_boost[] = {
885 static const struct reg_value gpr13_tx_atten[] = {
894 static const struct reg_value gpr13_rx_eq[] = {
937 u32 reg_value = 0; in imx_ahci_parse_props() local
945 reg_value |= prop->set_value; in imx_ahci_parse_props()
947 reg_value |= prop->def_value; in imx_ahci_parse_props()
[all …]
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| /linux-5.19.10/arch/powerpc/platforms/cell/ |
| D | cbe_thermal.c | 56 static inline u8 reg_to_temp(u8 reg_value) in reg_to_temp() argument
58 return ((reg_value & 0x3f) << 1) + TEMP_MIN; in reg_to_temp()
114 u64 reg_value; in store_throttle() local
126 reg_value = in_be64(&pmd_regs->tm_tpr.val); in store_throttle()
129 reg_value &= ~(0xffull << pos); in store_throttle()
131 reg_value |= new_value << pos; in store_throttle()
133 out_be64(&pmd_regs->tm_tpr.val, reg_value); in store_throttle()
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| /linux-5.19.10/drivers/misc/ |
| D | xilinx_sdfec.c | 263 u32 reg_value; in update_config_from_hw() local
267 reg_value = xsdfec_regread(xsdfec, XSDFEC_ORDER_ADDR); in update_config_from_hw()
268 xsdfec->config.order = reg_value; in update_config_from_hw()
278 reg_value = xsdfec_regread(xsdfec, XSDFEC_IMR_ADDR); in update_config_from_hw()
279 xsdfec->config.irq.enable_isr = (reg_value & XSDFEC_ISR_MASK) > 0; in update_config_from_hw()
281 reg_value = xsdfec_regread(xsdfec, XSDFEC_ECC_IMR_ADDR); in update_config_from_hw()
283 (reg_value & XSDFEC_ECC_ISR_MASK) > 0; in update_config_from_hw()
285 reg_value = xsdfec_regread(xsdfec, XSDFEC_AXIS_ENABLE_ADDR); in update_config_from_hw()
286 sdfec_started = (reg_value & XSDFEC_AXIS_IN_ENABLE_MASK) > 0; in update_config_from_hw()
437 u32 reg_value; in xsdfec_get_turbo() local
[all …]
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| /linux-5.19.10/sound/pci/echoaudio/ |
| D | echoaudio_gml.c | 66 __le32 reg_value; in write_control_reg() local
77 reg_value = cpu_to_le32(value); in write_control_reg()
78 if (reg_value != chip->comm_page->control_register || force) { in write_control_reg()
81 chip->comm_page->control_register = reg_value; in write_control_reg()
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| /linux-5.19.10/arch/mips/include/asm/sn/sn0/ |
| D | hubio.h | 203 u64 reg_value; member
445 u64 reg_value; member
467 u64 reg_value; member
514 u64 reg_value; member
556 u64 reg_value; member
672 u64 reg_value; member
709 u64 reg_value; member
824 u64 reg_value; member
839 #define iprb_regval reg_value
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| /linux-5.19.10/drivers/video/fbdev/via/ |
| D | hw.c | 1014 int reg_value; in viafb_load_fetch_count_reg() local
1020 reg_value = IGA1_FETCH_COUNT_FORMULA(h_addr, bpp_byte); in viafb_load_fetch_count_reg()
1024 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); in viafb_load_fetch_count_reg()
1027 reg_value = IGA2_FETCH_COUNT_FORMULA(h_addr, bpp_byte); in viafb_load_fetch_count_reg()
1031 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR); in viafb_load_fetch_count_reg()
1039 int reg_value; in viafb_load_FIFO_reg() local
1159 reg_value = IGA1_FIFO_DEPTH_SELECT_FORMULA(iga1_fifo_max_depth); in viafb_load_FIFO_reg()
1163 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); in viafb_load_FIFO_reg()
1166 reg_value = IGA1_FIFO_THRESHOLD_FORMULA(iga1_fifo_threshold); in viafb_load_FIFO_reg()
1173 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); in viafb_load_FIFO_reg()
[all …]
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| D | lcd.c | 338 int reg_value = 0; in load_lcd_scaling() local
353 reg_value = in load_lcd_scaling()
359 viafb_load_reg(reg_value, in load_lcd_scaling()
373 reg_value = in load_lcd_scaling()
380 viafb_load_reg(reg_value, in load_lcd_scaling()
385 DEBUG_MSG(KERN_INFO "Horizontal Scaling value = %d", reg_value); in load_lcd_scaling()
397 reg_value = in load_lcd_scaling()
403 viafb_load_reg(reg_value, in load_lcd_scaling()
417 reg_value = in load_lcd_scaling()
424 viafb_load_reg(reg_value, in load_lcd_scaling()
[all …]
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| /linux-5.19.10/drivers/net/ethernet/stmicro/stmmac/ |
| D | stmmac_hwtstamp.c | 31 u32 reg_value; in config_sub_second_increment() local
52 reg_value = data; in config_sub_second_increment()
54 reg_value <<= GMAC4_PTP_SSIR_SSINC_SHIFT; in config_sub_second_increment()
56 writel(reg_value, ioaddr + PTP_SSIR); in config_sub_second_increment()
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| /linux-5.19.10/drivers/media/i2c/ |
| D | ov5645.c | 73 struct reg_value { struct
81 const struct reg_value *data; argument
122 static const struct reg_value ov5645_global_init_setting[] = {
364 static const struct reg_value ov5645_setting_sxga[] = {
412 static const struct reg_value ov5645_setting_1080p[] = {
462 static const struct reg_value ov5645_setting_full[] = {
623 const struct reg_value *settings, in ov5645_set_register_array()
717 u32 reg_value = (value * 0x10) + 0x40; in ov5645_set_saturation() local
720 ret = ov5645_write_reg(ov5645, OV5645_SDE_SAT_U, reg_value); in ov5645_set_saturation()
724 return ov5645_write_reg(ov5645, OV5645_SDE_SAT_V, reg_value); in ov5645_set_saturation()
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