Searched refs:reg_ctrl2 (Results 1 – 2 of 2) sorted by relevance
| /linux-5.19.10/drivers/net/can/flexcan/ |
| D | flexcan-core.c | 1213 u32 reg_fdcbt, reg_ctrl2; in flexcan_set_bittiming_cbt() local
1249 reg_ctrl2 = priv->read(®s->ctrl2); in flexcan_set_bittiming_cbt()
1250 reg_ctrl2 &= ~FLEXCAN_CTRL2_ISOCANFDEN; in flexcan_set_bittiming_cbt()
1252 reg_ctrl2 |= FLEXCAN_CTRL2_ISOCANFDEN; in flexcan_set_bittiming_cbt()
1254 netdev_dbg(dev, "writing ctrl2=0x%08x\n", reg_ctrl2); in flexcan_set_bittiming_cbt()
1255 priv->write(reg_ctrl2, ®s->ctrl2); in flexcan_set_bittiming_cbt()
1318 u32 reg_ctrl2; in flexcan_ram_init() local
1328 reg_ctrl2 = priv->read(®s->ctrl2); in flexcan_ram_init()
1329 reg_ctrl2 |= FLEXCAN_CTRL2_WRMFRZ; in flexcan_ram_init()
1330 priv->write(reg_ctrl2, ®s->ctrl2); in flexcan_ram_init()
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| /linux-5.19.10/drivers/gpu/drm/msm/dsi/ |
| D | dsi_host.c | 918 u32 reg, intf_width, reg_ctrl, reg_ctrl2; in dsi_update_dsc_timing() local
962 reg_ctrl2 = dsi_read(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL2); in dsi_update_dsc_timing()
967 reg_ctrl2 &= ~DSI_COMMAND_COMPRESSION_MODE_CTRL2_STREAM0_SLICE_WIDTH__MASK; in dsi_update_dsc_timing()
968 reg_ctrl2 |= DSI_COMMAND_COMPRESSION_MODE_CTRL2_STREAM0_SLICE_WIDTH(bytes_in_slice); in dsi_update_dsc_timing()
971 dsi_write(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL2, reg_ctrl2); in dsi_update_dsc_timing()
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