| /linux-5.19.10/arch/s390/kernel/ |
| D | idle.c | 26 struct s390_idle_data *idle = this_cpu_ptr(&s390_idle); in account_idle_time_irq() local
34 this_cpu_add(mt_cycles[i], cycles_new[i] - idle->mt_cycles_enter[i]); in account_idle_time_irq()
37 idle->clock_idle_exit = S390_lowcore.int_clock; in account_idle_time_irq()
38 idle->timer_idle_exit = S390_lowcore.sys_enter_timer; in account_idle_time_irq()
40 S390_lowcore.steal_timer += idle->clock_idle_enter - S390_lowcore.last_update_clock; in account_idle_time_irq()
41 S390_lowcore.last_update_clock = idle->clock_idle_exit; in account_idle_time_irq()
43 S390_lowcore.system_timer += S390_lowcore.last_update_timer - idle->timer_idle_enter; in account_idle_time_irq()
44 S390_lowcore.last_update_timer = idle->timer_idle_exit; in account_idle_time_irq()
49 struct s390_idle_data *idle = this_cpu_ptr(&s390_idle); in arch_cpu_idle() local
59 psw_idle(idle, psw_mask); in arch_cpu_idle()
[all …]
|
| /linux-5.19.10/Documentation/devicetree/bindings/powerpc/opal/ |
| D | power-mgt.txt | 5 idle states. The description of these idle states is exposed via the
10 Typically each idle state has the following associated properties:
12 - name: The name of the idle state as defined by the firmware.
14 - flags: indicating some aspects of this idle states such as the
16 idle states and so on. The flag bits are as follows:
19 CPU from idle to running.
22 this idle state in order to accrue power-savings
27 The following properties provide details about the idle states. These
29 provides the value of that property for the idle state associated with
32 If idle-states are defined, then the properties
[all …]
|
| /linux-5.19.10/Documentation/devicetree/bindings/cpu/ |
| D | idle-states.yaml | 4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
21 representing the range of dynamic idle states that a processor can enter at
23 parameters required to enter/exit specific idle states on a given processor.
26 2 - ARM idle states
40 PM implementation to put the processor in different idle states (which include
41 states listed above; "off" state is not an idle state since it does not have
48 The device tree binding definition for ARM idle states is the subject of this
52 3 - RISC-V idle states
56 suspend (or idle) states (ranging from simple WFI, power gating, etc). The
60 The platform specific suspend (or idle) states of a hart can be either
[all …]
|
| /linux-5.19.10/Documentation/devicetree/bindings/memory-controllers/ |
| D | rockchip,rk3399-dmc.yaml | 60 Configure the PD_IDLE value. Defines the power-down idle period in which
61 memories are placed into power-down mode if bus is idle for PD_IDLE DFI
63 See also rockchip,pd-idle-ns.
69 Configure the SR_IDLE value. Defines the self-refresh idle period in
70 which memories are placed into self-refresh mode if bus is idle for
72 See also rockchip,sr-idle-ns.
79 Defines the memory self-refresh and controller clock gating idle period.
81 arg gating started if bus is idle for sr_mc_gate_idle*1024 DFI clock
83 See also rockchip,sr-mc-gate-idle-ns.
89 Defines the self-refresh power down idle period in which memories are
[all …]
|
| /linux-5.19.10/Documentation/devicetree/bindings/thermal/ |
| D | thermal-idle.yaml | 5 $id: http://devicetree.org/schemas/thermal/thermal-idle.yaml#
8 title: Thermal idle cooling device binding
14 The thermal idle cooling device allows the system to passively
15 mitigate the temperature on the device by injecting idle cycles,
18 This binding describes the thermal idle node.
22 const: thermal-idle
24 A thermal-idle node describes the idle cooling device properties to
36 The idle duration in microsecond the device should cool down.
40 The exit latency constraint in microsecond for the injected idle state
42 idle state from among all the present ones.
[all …]
|
| /linux-5.19.10/Documentation/admin-guide/pm/ |
| D | intel_idle.rst | 17 :doc:`CPU idle time management subsystem <cpuidle>` in the Linux kernel
18 (``CPUIdle``). It is the default CPU idle time management driver for the
27 logical CPU executing it is idle and so it may be possible to put some of the
42 .. _intel-idle-enumeration-of-states:
50 as C-states (in the ACPI terminology) or idle states. The list of meaningful
51 ``MWAIT`` hint values and idle states (i.e. low-power configurations of the
55 In order to create a list of available idle states required by the ``CPUIdle``
56 subsystem (see :ref:`idle-states-representation` in
58 ``intel_idle`` can use two sources of information: static tables of idle states
66 `below <intel-idle-parameters_>`_.]
[all …]
|
| D | cpuidle.rst | 21 memory or executed. Those states are the *idle* states of the processor.
23 Since part of the processor hardware is not used in idle states, entering them
27 CPU idle time management is an energy-efficiency feature concerned about using
28 the idle states of processors for this purpose.
33 CPU idle time management operates on CPUs as seen by the *CPU scheduler* (that
44 enter an idle state, that applies to the processor as a whole.
52 enter an idle state, that applies to the core that asked for it in the first
56 except for one have been put into idle states at the "core level" and the
57 remaining core asks the processor to enter an idle state, that may trigger it
58 to put the whole larger unit into an idle state which also will affect the
[all …]
|
| /linux-5.19.10/Documentation/devicetree/bindings/power/ |
| D | domain-idle-state.yaml | 4 $id: http://devicetree.org/schemas/power/domain-idle-state.yaml#
13 A domain idle state node represents the state parameters that will be used to
18 const: domain-idle-states
24 Each state node represents a domain idle state description.
28 const: domain-idle-state
32 The worst case latency in microseconds required to enter the idle
38 The worst case latency in microseconds required to exit the idle
43 The minimum residency duration in microseconds after which the idle
45 entering the idle state.
58 domain-idle-states {
[all …]
|
| D | power-domain.yaml | 30 domain-idle-states:
35 Phandles of idle states that defines the available states for the
36 power-domain provider. The idle state definitions are compatible with the
37 domain-idle-state bindings, specified in ./domain-idle-state.yaml.
39 Note that, the domain-idle-state property reflects the idle states of this
40 PM domain and not the idle states of the devices or sub-domains in the PM
41 domain. Devices and sub-domains have their own idle states independent of
42 the parent domain's idle states. In the absence of this property, the
112 domain-idle-states = <&DOMAIN_RET>, <&DOMAIN_PWR_DN>;
120 domain-idle-states = <&DOMAIN_PWR_DN>;
[all …]
|
| /linux-5.19.10/drivers/staging/media/atomisp/pci/ |
| D | sh_css_hrt.c | 39 bool not_idle = false, idle; in sh_css_hrt_system_is_idle() local
42 idle = sp_ctrl_getbit(SP0_ID, SP_SC_REG, SP_IDLE_BIT); in sh_css_hrt_system_is_idle()
43 not_idle |= !idle; in sh_css_hrt_system_is_idle()
44 if (!idle) in sh_css_hrt_system_is_idle()
47 idle = isp_ctrl_getbit(ISP0_ID, ISP_SC_REG, ISP_IDLE_BIT); in sh_css_hrt_system_is_idle()
48 not_idle |= !idle; in sh_css_hrt_system_is_idle()
49 if (!idle) in sh_css_hrt_system_is_idle()
|
| /linux-5.19.10/Documentation/driver-api/thermal/ |
| D | intel_powerclamp.rst | 44 idle injection across all online CPU threads was introduced. The goal
68 If the kernel can also inject idle time to the system, then a
71 control system, where the target set point is a user-selected idle
73 between the actual package level C-state residency ratio and the target idle
81 thread synchronizes its idle time and duration, based on the rounding
89 Alignment of idle time around jiffies ensures scalability for HZ
92 kidle_inject/cpu. During idle injection, it runs monitor/mwait idle
96 The NOHZ schedule tick is disabled during idle time, but interrupts
123 In terms of dynamics of the idle control system, package level idle
126 intel_powerclamp driver attempts to enforce the desired idle time
[all …]
|
| D | cpu-idle-cooling.rst | 37 decrease. Acting on the idle state duration or the idle cycle
47 At a specific OPP, we can assume that injecting idle cycle on all CPUs
49 idle state target residency, we lead to dropping the static and the
51 this state). So the sustainable power with idle cycles has a linear
60 The base concept of the idle injection is to force the CPU to go to an
61 idle state for a specified time each control cycle, it provides
64 their idle cycles synchronously, the cluster can reach its power down
66 to almost zero. However, these idle cycles injection will add extra
69 We use a fixed duration of idle injection that gives an acceptable
71 or decreased by modulating the duty cycle of the idle injection.
[all …]
|
| /linux-5.19.10/Documentation/devicetree/bindings/mux/ |
| D | mux-controller.yaml | 33 have when it is idle. The idle-state property is used for this. If the
34 idle-state is not present, the mux controller is typically left as is when
35 it is idle. For multiplexer chips that expose several mux controllers, the
36 idle-state property is an array with one idle state for each mux controller.
39 as is when it is idle. This is the default, but can still be useful for
41 there is a need to "step past" a mux controller and set some other idle
45 multiplexer. Using this disconnected high-impedance state as the idle state
46 is indicated with idle state (-2).
62 idle-state = <MUX_IDLE_DISCONNECT MUX_IDLE_AS_IS 2>;
85 idle-state:
[all …]
|
| /linux-5.19.10/fs/proc/ |
| D | stat.c | 29 u64 idle; in get_idle_time() local
31 idle = kcs->cpustat[CPUTIME_IDLE]; in get_idle_time()
33 idle += arch_idle_time(cpu); in get_idle_time()
34 return idle; in get_idle_time()
51 u64 idle, idle_usecs = -1ULL; in get_idle_time() local
58 idle = kcs->cpustat[CPUTIME_IDLE]; in get_idle_time()
60 idle = idle_usecs * NSEC_PER_USEC; in get_idle_time()
62 return idle; in get_idle_time()
111 u64 user, nice, system, idle, iowait, irq, softirq, steal; in show_stat() local
118 user = nice = system = idle = iowait = in show_stat()
[all …]
|
| D | uptime.c | 14 struct timespec64 idle; in uptime_proc_show() local
30 idle.tv_sec = div_u64_rem(idle_nsec, NSEC_PER_SEC, &rem); in uptime_proc_show()
31 idle.tv_nsec = rem; in uptime_proc_show()
35 (unsigned long) idle.tv_sec, in uptime_proc_show()
36 (idle.tv_nsec / (NSEC_PER_SEC / 100))); in uptime_proc_show()
|
| /linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| D | g84.c | 121 bool idle, timeout = false; in g84_gr_tlb_flush() local
132 idle = true; in g84_gr_tlb_flush()
134 for (tmp = nvkm_rd32(device, 0x400380); tmp && idle; tmp >>= 3) { in g84_gr_tlb_flush()
136 idle = false; in g84_gr_tlb_flush()
139 for (tmp = nvkm_rd32(device, 0x400384); tmp && idle; tmp >>= 3) { in g84_gr_tlb_flush()
141 idle = false; in g84_gr_tlb_flush()
144 for (tmp = nvkm_rd32(device, 0x400388); tmp && idle; tmp >>= 3) { in g84_gr_tlb_flush()
146 idle = false; in g84_gr_tlb_flush()
148 } while (!idle && in g84_gr_tlb_flush()
|
| /linux-5.19.10/arch/arm/mach-tegra/ |
| D | platsmp.c | 42 static int tegra20_boot_secondary(unsigned int cpu, struct task_struct *idle) in tegra20_boot_secondary() argument
70 static int tegra30_boot_secondary(unsigned int cpu, struct task_struct *idle) in tegra30_boot_secondary() argument
129 static int tegra114_boot_secondary(unsigned int cpu, struct task_struct *idle) in tegra114_boot_secondary() argument
159 struct task_struct *idle) in tegra_boot_secondary() argument
162 return tegra20_boot_secondary(cpu, idle); in tegra_boot_secondary()
164 return tegra30_boot_secondary(cpu, idle); in tegra_boot_secondary()
166 return tegra114_boot_secondary(cpu, idle); in tegra_boot_secondary()
168 return tegra114_boot_secondary(cpu, idle); in tegra_boot_secondary()
|
| /linux-5.19.10/Documentation/devicetree/bindings/arm/msm/ |
| D | qcom,idle-state.txt | 3 ARM provides idle-state node to define the cpuidle states, as defined in [1].
4 cpuidle-qcom is the cpuidle driver for Qualcomm SoCs and uses these idle
6 The idle states supported by the QCOM SoC are defined as -
18 hierarchy to enter standby states, when all cpus are idle. An interrupt brings
34 between the time it enters idle and the next known wake up. SPC mode is used
37 sequence for this idle state is programmed to power down the supply to the
58 The idle-state for QCOM SoCs are distinguished by the compatible property of
59 the idle-states device node.
61 The devicetree representation of the idle state should be -
66 "qcom,idle-state-ret",
[all …]
|
| /linux-5.19.10/Documentation/driver-api/pm/ |
| D | cpuidle.rst | 18 cores) is idle after an interrupt or equivalent wakeup event, which means that
19 there are no tasks to run on it except for the special "idle" task associated
21 belongs to. That can be done by making the idle logical CPU stop fetching
23 depended on by it into an idle state in which they will draw less power.
25 However, there may be multiple different idle states that can be used in such a
28 particular idle state. That is the role of the CPU idle time management
35 units: *governors* responsible for selecting idle states to ask the processor
43 A CPU idle time (``CPUIdle``) governor is a bundle of policy code invoked when
44 one of the logical CPUs in the system turns out to be idle. Its role is to
45 select an idle state to ask the processor to enter in order to save some energy.
[all …]
|
| /linux-5.19.10/Documentation/devicetree/bindings/i2c/ |
| D | i2c-mux-pinctrl.yaml | 34 The only exception is that no bus will be created for a state named "idle". If such a state is
37 pinctrl-names = "ddc", "pta", "idle" -> ddc = bus 0, pta = bus 1
38 pinctrl-names = "ddc", "idle", "pta" -> Invalid ("idle" not last)
39 pinctrl-names = "idle", "ddc", "pta" -> Invalid ("idle" not last)
44 If an idle state is defined, whenever an access is not being made to a device on a child bus,
45 the idle pinctrl state will be programmed into hardware.
47 If an idle state is not defined, the most recently used pinctrl state will be left programmed
77 pinctrl-names = "ddc", "pta", "idle";
|
| /linux-5.19.10/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls2088a.dtsi | 21 cpu-idle-states = <&CPU_PW20>;
31 cpu-idle-states = <&CPU_PW20>;
41 cpu-idle-states = <&CPU_PW20>;
51 cpu-idle-states = <&CPU_PW20>;
62 cpu-idle-states = <&CPU_PW20>;
71 cpu-idle-states = <&CPU_PW20>;
81 cpu-idle-states = <&CPU_PW20>;
91 cpu-idle-states = <&CPU_PW20>;
113 compatible = "arm,idle-state";
114 idle-state-name = "PW20";
|
| D | fsl-ls2080a.dtsi | 21 cpu-idle-states = <&CPU_PW20>;
31 cpu-idle-states = <&CPU_PW20>;
41 cpu-idle-states = <&CPU_PW20>;
51 cpu-idle-states = <&CPU_PW20>;
61 cpu-idle-states = <&CPU_PW20>;
71 cpu-idle-states = <&CPU_PW20>;
82 cpu-idle-states = <&CPU_PW20>;
91 cpu-idle-states = <&CPU_PW20>;
113 compatible = "arm,idle-state";
114 idle-state-name = "PW20";
|
| /linux-5.19.10/tools/power/cpupower/ |
| D | cpupower-completion.sh | 41 idle-info) COMPREPLY=($(compgen -W "$flags" -- "$cur")) ;;
51 idle-set) COMPREPLY=($(compgen -W "$flags" -- "$cur")) ;;
86 idle-info) _idle_info ;;
87 idle-set) _idle_set ;;
120 idle-info) _idle_info ;;
121 idle-set) _idle_set ;;
|
| /linux-5.19.10/Documentation/admin-guide/mm/ |
| D | idle_page_tracking.rst | 10 The idle page tracking feature allows to track which memory pages are being
11 accessed by a workload and which are idle. This information can be useful for
23 The idle page tracking API is located at ``/sys/kernel/mm/page_idle``.
30 set, the corresponding page is idle.
32 A page is considered idle if it has not been accessed since it was marked idle
35 To mark a page idle one has to set the bit corresponding to
41 page types (e.g. SLAB pages) an attempt to mark a page idle is silently ignored,
42 and hence such pages are never reported idle.
44 For huge pages the idle flag is set only on the head page, so one has to read
45 ``/proc/kpageflags`` in order to correctly count idle huge pages.
[all …]
|
| /linux-5.19.10/drivers/cpuidle/ |
| D | Kconfig.arm | 6 bool "Generic ARM/ARM64 CPU idle Driver"
11 It provides a generic idle driver whose idle states are configured
13 initialized by calling the CPU operations init idle hook
17 bool "PSCI CPU idle Driver"
23 It provides an idle driver that is capable of detecting and
24 managing idle states through the PSCI firmware interface.
27 bool "PSCI CPU idle Domain"
35 idle states.
45 Select this option to enable CPU idle driver for big.LITTLE based
48 multiple CPU idle drivers infrastructure.
|