| /linux-5.19.10/drivers/gpu/drm/i915/selftests/ |
| D | mock_gem_device.c | 46 void mock_device_flush(struct drm_i915_private *i915) in mock_device_flush() argument
48 struct intel_gt *gt = to_gt(i915); in mock_device_flush()
61 struct drm_i915_private *i915 = to_i915(dev); in mock_device_release() local
63 if (!i915->do_release) in mock_device_release()
66 mock_device_flush(i915); in mock_device_release()
67 intel_gt_driver_remove(to_gt(i915)); in mock_device_release()
69 i915_gem_drain_workqueue(i915); in mock_device_release()
70 i915_gem_drain_freed_objects(i915); in mock_device_release()
72 mock_fini_ggtt(to_gt(i915)->ggtt); in mock_device_release()
73 destroy_workqueue(i915->wq); in mock_device_release()
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| D | i915_gem.c | 43 static void trash_stolen(struct drm_i915_private *i915) in trash_stolen() argument
45 struct i915_ggtt *ggtt = to_gt(i915)->ggtt; in trash_stolen()
47 const resource_size_t size = resource_size(&i915->dsm); in trash_stolen()
56 const dma_addr_t dma = i915->dsm.start + page; in trash_stolen()
73 static void simulate_hibernate(struct drm_i915_private *i915) in simulate_hibernate() argument
77 wakeref = intel_runtime_pm_get(&i915->runtime_pm); in simulate_hibernate()
86 trash_stolen(i915); in simulate_hibernate()
88 intel_runtime_pm_put(&i915->runtime_pm, wakeref); in simulate_hibernate()
91 static int igt_pm_prepare(struct drm_i915_private *i915) in igt_pm_prepare() argument
93 i915_gem_suspend(i915); in igt_pm_prepare()
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| /linux-5.19.10/drivers/gpu/drm/i915/ |
| D | vlv_sideband.h | 28 void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports);
29 u32 vlv_iosf_sb_read(struct drm_i915_private *i915, u8 port, u32 reg);
30 void vlv_iosf_sb_write(struct drm_i915_private *i915,
32 void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports);
34 static inline void vlv_bunit_get(struct drm_i915_private *i915) in vlv_bunit_get() argument
36 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_BUNIT)); in vlv_bunit_get()
39 u32 vlv_bunit_read(struct drm_i915_private *i915, u32 reg);
40 void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val);
42 static inline void vlv_bunit_put(struct drm_i915_private *i915) in vlv_bunit_put() argument
44 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_BUNIT)); in vlv_bunit_put()
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| D | vlv_sideband.c | 29 static void __vlv_punit_get(struct drm_i915_private *i915) in __vlv_punit_get() argument
43 if (IS_VALLEYVIEW(i915)) { in __vlv_punit_get()
44 cpu_latency_qos_update_request(&i915->sb_qos, 0); in __vlv_punit_get()
49 static void __vlv_punit_put(struct drm_i915_private *i915) in __vlv_punit_put() argument
51 if (IS_VALLEYVIEW(i915)) in __vlv_punit_put()
52 cpu_latency_qos_update_request(&i915->sb_qos, in __vlv_punit_put()
58 void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports) in vlv_iosf_sb_get() argument
61 __vlv_punit_get(i915); in vlv_iosf_sb_get()
63 mutex_lock(&i915->sb_lock); in vlv_iosf_sb_get()
66 void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports) in vlv_iosf_sb_put() argument
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| D | intel_dram.c | 124 skl_dram_get_dimm_info(struct drm_i915_private *i915, in skl_dram_get_dimm_info() argument
128 if (GRAPHICS_VER(i915) >= 11) { in skl_dram_get_dimm_info()
138 drm_dbg_kms(&i915->drm, in skl_dram_get_dimm_info()
145 skl_dram_get_channel_info(struct drm_i915_private *i915, in skl_dram_get_channel_info() argument
149 skl_dram_get_dimm_info(i915, &ch->dimm_l, in skl_dram_get_channel_info()
151 skl_dram_get_dimm_info(i915, &ch->dimm_s, in skl_dram_get_channel_info()
155 drm_dbg_kms(&i915->drm, "CH%u not populated\n", channel); in skl_dram_get_channel_info()
169 drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb DIMMs: %s\n", in skl_dram_get_channel_info()
185 skl_dram_get_channels_info(struct drm_i915_private *i915) in skl_dram_get_channels_info() argument
187 struct dram_info *dram_info = &i915->dram_info; in skl_dram_get_channels_info()
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| D | i915_driver.c | 300 static void sanitize_gpu(struct drm_i915_private *i915) in sanitize_gpu() argument
302 if (!INTEL_INFO(i915)->gpu_reset_clobbers_display) in sanitize_gpu()
303 __intel_gt_reset(to_gt(i915), ALL_ENGINES); in sanitize_gpu()
479 static int i915_set_dma_info(struct drm_i915_private *i915) in i915_set_dma_info() argument
481 unsigned int mask_size = INTEL_INFO(i915)->dma_mask_size; in i915_set_dma_info()
490 dma_set_max_seg_size(i915->drm.dev, UINT_MAX); in i915_set_dma_info()
492 ret = dma_set_mask(i915->drm.dev, DMA_BIT_MASK(mask_size)); in i915_set_dma_info()
497 if (GRAPHICS_VER(i915) == 2) in i915_set_dma_info()
509 if (IS_I965G(i915) || IS_I965GM(i915)) in i915_set_dma_info()
512 ret = dma_set_coherent_mask(i915->drm.dev, DMA_BIT_MASK(mask_size)); in i915_set_dma_info()
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| D | intel_pcode.c | 55 static int __snb_pcode_rw(struct drm_i915_private *i915, u32 mbox, in __snb_pcode_rw() argument
60 struct intel_uncore *uncore = &i915->uncore; in __snb_pcode_rw()
62 lockdep_assert_held(&i915->sb_lock); in __snb_pcode_rw()
91 if (GRAPHICS_VER(i915) > 6) in __snb_pcode_rw()
97 int snb_pcode_read(struct drm_i915_private *i915, u32 mbox, u32 *val, u32 *val1) in snb_pcode_read() argument
101 mutex_lock(&i915->sb_lock); in snb_pcode_read()
102 err = __snb_pcode_rw(i915, mbox, val, val1, 500, 20, true); in snb_pcode_read()
103 mutex_unlock(&i915->sb_lock); in snb_pcode_read()
106 drm_dbg(&i915->drm, in snb_pcode_read()
114 int snb_pcode_write_timeout(struct drm_i915_private *i915, u32 mbox, u32 val, in snb_pcode_write_timeout() argument
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| D | i915_switcheroo.c | 15 struct drm_i915_private *i915 = pdev_to_i915(pdev); in i915_switcheroo_set_state() local
18 if (!i915) { in i915_switcheroo_set_state()
24 drm_info(&i915->drm, "switched on\n"); in i915_switcheroo_set_state()
25 i915->drm.switch_power_state = DRM_SWITCH_POWER_CHANGING; in i915_switcheroo_set_state()
28 i915_driver_resume_switcheroo(i915); in i915_switcheroo_set_state()
29 i915->drm.switch_power_state = DRM_SWITCH_POWER_ON; in i915_switcheroo_set_state()
31 drm_info(&i915->drm, "switched off\n"); in i915_switcheroo_set_state()
32 i915->drm.switch_power_state = DRM_SWITCH_POWER_CHANGING; in i915_switcheroo_set_state()
33 i915_driver_suspend_switcheroo(i915, pmm); in i915_switcheroo_set_state()
34 i915->drm.switch_power_state = DRM_SWITCH_POWER_OFF; in i915_switcheroo_set_state()
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| D | intel_wopcm.c | 80 struct drm_i915_private *i915 = wopcm_to_i915(wopcm); in intel_wopcm_init_early() local
82 if (!HAS_GT_UC(i915)) in intel_wopcm_init_early()
85 if (GRAPHICS_VER(i915) >= 11) in intel_wopcm_init_early()
90 drm_dbg(&i915->drm, "WOPCM: %uK\n", wopcm->size / 1024); in intel_wopcm_init_early()
93 static u32 context_reserved_size(struct drm_i915_private *i915) in context_reserved_size() argument
95 if (IS_GEN9_LP(i915)) in context_reserved_size()
97 else if (GRAPHICS_VER(i915) >= 11) in context_reserved_size()
103 static bool gen9_check_dword_gap(struct drm_i915_private *i915, in gen9_check_dword_gap() argument
116 drm_err(&i915->drm, in gen9_check_dword_gap()
126 static bool gen9_check_huc_fw_fits(struct drm_i915_private *i915, in gen9_check_huc_fw_fits() argument
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| D | i915_getparam.c | 16 struct drm_i915_private *i915 = to_i915(dev); in i915_getparam_ioctl() local
18 const struct sseu_dev_info *sseu = &to_gt(i915)->info.sseu; in i915_getparam_ioctl()
36 value = to_gt(i915)->ggtt->num_fences; in i915_getparam_ioctl()
39 value = !!i915->overlay; in i915_getparam_ioctl()
42 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
46 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
50 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
54 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
58 value = HAS_LLC(i915); in i915_getparam_ioctl()
61 value = HAS_WT(i915); in i915_getparam_ioctl()
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| /linux-5.19.10/drivers/gpu/drm/i915/display/ |
| D | intel_bios.c | 65 struct drm_i915_private *i915; member
156 find_section(struct drm_i915_private *i915, in find_section() argument
161 list_for_each_entry(entry, &i915->vbt.bdb_blocks, node) { in find_section()
211 static size_t lfp_data_min_size(struct drm_i915_private *i915) in lfp_data_min_size() argument
216 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS); in lfp_data_min_size()
367 static void *generate_lfp_data_ptrs(struct drm_i915_private *i915, in generate_lfp_data_ptrs() argument
379 drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n"); in generate_lfp_data_ptrs()
456 init_bdb_block(struct drm_i915_private *i915, in init_bdb_block() argument
469 temp_block = generate_lfp_data_ptrs(i915, bdb); in init_bdb_block()
476 drm_WARN(&i915->drm, min_size == 0, in init_bdb_block()
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| D | intel_fbc.c | 84 struct drm_i915_private *i915; member
146 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); in skl_fbc_min_cfb_stride() local
160 if (DISPLAY_VER(i915) >= 11) in skl_fbc_min_cfb_stride()
176 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); in intel_fbc_cfb_stride() local
184 if (DISPLAY_VER(i915) >= 9) in intel_fbc_cfb_stride()
192 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); in intel_fbc_cfb_size() local
195 if (DISPLAY_VER(i915) == 7) in intel_fbc_cfb_size()
197 else if (DISPLAY_VER(i915) >= 8) in intel_fbc_cfb_size()
205 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); in intel_fbc_override_cfb_stride() local
218 (DISPLAY_VER(i915) == 9 && fb->modifier == DRM_FORMAT_MOD_LINEAR)) in intel_fbc_override_cfb_stride()
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| D | intel_frontbuffer.c | 79 static void frontbuffer_flush(struct drm_i915_private *i915, in frontbuffer_flush() argument
84 spin_lock(&i915->fb_tracking.lock); in frontbuffer_flush()
85 frontbuffer_bits &= ~i915->fb_tracking.busy_bits; in frontbuffer_flush()
86 spin_unlock(&i915->fb_tracking.lock); in frontbuffer_flush()
94 intel_drrs_flush(i915, frontbuffer_bits); in frontbuffer_flush()
95 intel_psr_flush(i915, frontbuffer_bits, origin); in frontbuffer_flush()
96 intel_fbc_flush(i915, frontbuffer_bits, origin); in frontbuffer_flush()
111 void intel_frontbuffer_flip_prepare(struct drm_i915_private *i915, in intel_frontbuffer_flip_prepare() argument
114 spin_lock(&i915->fb_tracking.lock); in intel_frontbuffer_flip_prepare()
115 i915->fb_tracking.flip_bits |= frontbuffer_bits; in intel_frontbuffer_flip_prepare()
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| D | intel_tc.c | 33 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_tc_port_in_mode() local
34 enum phy phy = intel_port_to_phy(i915, dig_port->base.port); in intel_tc_port_in_mode()
36 return intel_phy_is_tc(i915, phy) && dig_port->tc_mode == mode; in intel_tc_port_in_mode()
56 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_tc_cold_requires_aux_pw() local
58 return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) || in intel_tc_cold_requires_aux_pw()
59 IS_ALDERLAKE_P(i915); in intel_tc_cold_requires_aux_pw()
65 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in tc_cold_get_power_domain() local
70 return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch); in tc_cold_get_power_domain()
77 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in tc_cold_block_in_mode() local
81 return intel_display_power_get(i915, *domain); in tc_cold_block_in_mode()
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| D | intel_display_power.c | 340 struct drm_i915_private *i915 = container_of(power_domains, in assert_async_put_domain_masks_disjoint() local
344 return !drm_WARN_ON(&i915->drm, in assert_async_put_domain_masks_disjoint()
353 struct drm_i915_private *i915 = container_of(power_domains, in __async_put_domains_state_ok() local
362 err |= drm_WARN_ON(&i915->drm, in __async_put_domains_state_ok()
367 err |= drm_WARN_ON(&i915->drm, in __async_put_domains_state_ok()
376 struct drm_i915_private *i915 = container_of(power_domains, in print_power_domains() local
381 drm_dbg(&i915->drm, "%s (%d):\n", prefix, bitmap_weight(mask->bits, POWER_DOMAIN_NUM)); in print_power_domains()
383 drm_dbg(&i915->drm, "%s use_count %d\n", in print_power_domains()
391 struct drm_i915_private *i915 = container_of(power_domains, in print_async_put_domains_state() local
395 drm_dbg(&i915->drm, "async_put_wakeref %u\n", in print_async_put_domains_state()
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| D | hsw_ips.c | 16 struct drm_i915_private *i915 = to_i915(crtc->base.dev); in hsw_ips_enable() local
26 drm_WARN_ON(&i915->drm, in hsw_ips_enable()
29 if (IS_BROADWELL(i915)) { in hsw_ips_enable()
30 drm_WARN_ON(&i915->drm, in hsw_ips_enable()
31 snb_pcode_write(i915, DISPLAY_IPS_CONTROL, in hsw_ips_enable()
40 intel_de_write(i915, IPS_CTL, IPS_ENABLE); in hsw_ips_enable()
48 if (intel_de_wait_for_set(i915, IPS_CTL, IPS_ENABLE, 50)) in hsw_ips_enable()
49 drm_err(&i915->drm, in hsw_ips_enable()
57 struct drm_i915_private *i915 = to_i915(crtc->base.dev); in hsw_ips_disable() local
63 if (IS_BROADWELL(i915)) { in hsw_ips_disable()
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| D | intel_quirks.c | 15 static void quirk_ssc_force_disable(struct drm_i915_private *i915) in quirk_ssc_force_disable() argument
17 i915->quirks |= QUIRK_LVDS_SSC_DISABLE; in quirk_ssc_force_disable()
18 drm_info(&i915->drm, "applying lvds SSC disable quirk\n"); in quirk_ssc_force_disable()
25 static void quirk_invert_brightness(struct drm_i915_private *i915) in quirk_invert_brightness() argument
27 i915->quirks |= QUIRK_INVERT_BRIGHTNESS; in quirk_invert_brightness()
28 drm_info(&i915->drm, "applying inverted panel brightness quirk\n"); in quirk_invert_brightness()
32 static void quirk_backlight_present(struct drm_i915_private *i915) in quirk_backlight_present() argument
34 i915->quirks |= QUIRK_BACKLIGHT_PRESENT; in quirk_backlight_present()
35 drm_info(&i915->drm, "applying backlight present quirk\n"); in quirk_backlight_present()
41 static void quirk_increase_t12_delay(struct drm_i915_private *i915) in quirk_increase_t12_delay() argument
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| D | intel_vga.c | 16 static i915_reg_t intel_vga_cntrl_reg(struct drm_i915_private *i915) in intel_vga_cntrl_reg() argument
18 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_vga_cntrl_reg()
20 else if (DISPLAY_VER(i915) >= 5) in intel_vga_cntrl_reg()
59 void intel_vga_redisable(struct drm_i915_private *i915) in intel_vga_redisable() argument
72 wakeref = intel_display_power_get_if_enabled(i915, POWER_DOMAIN_VGA); in intel_vga_redisable()
76 intel_vga_redisable_power_on(i915); in intel_vga_redisable()
78 intel_display_power_put(i915, POWER_DOMAIN_VGA, wakeref); in intel_vga_redisable()
81 void intel_vga_reset_io_mem(struct drm_i915_private *i915) in intel_vga_reset_io_mem() argument
83 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); in intel_vga_reset_io_mem()
101 intel_vga_set_state(struct drm_i915_private *i915, bool enable_decode) in intel_vga_set_state() argument
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| D | intel_de.h | 14 intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) in intel_de_read() argument
16 return intel_uncore_read(&i915->uncore, reg); in intel_de_read()
20 intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg) in intel_de_posting_read() argument
22 intel_uncore_posting_read(&i915->uncore, reg); in intel_de_posting_read()
26 intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val) in intel_de_write() argument
28 intel_uncore_write(&i915->uncore, reg, val); in intel_de_write()
32 intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set) in intel_de_rmw() argument
34 intel_uncore_rmw(&i915->uncore, reg, clear, set); in intel_de_rmw()
38 intel_de_wait_for_register(struct drm_i915_private *i915, i915_reg_t reg, in intel_de_wait_for_register() argument
41 return intel_wait_for_register(&i915->uncore, reg, mask, value, timeout); in intel_de_wait_for_register()
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| D | intel_display_power.h | 168 void intel_display_power_suspend_late(struct drm_i915_private *i915);
169 void intel_display_power_resume_early(struct drm_i915_private *i915);
170 void intel_display_power_suspend(struct drm_i915_private *i915);
171 void intel_display_power_resume(struct drm_i915_private *i915);
187 void __intel_display_power_put_async(struct drm_i915_private *i915,
190 void intel_display_power_flush_work(struct drm_i915_private *i915);
196 intel_display_power_put_async(struct drm_i915_private *i915, in intel_display_power_put_async() argument
200 __intel_display_power_put_async(i915, domain, wakeref); in intel_display_power_put_async()
207 intel_display_power_put(struct drm_i915_private *i915, in intel_display_power_put() argument
211 intel_display_power_put_unchecked(i915, domain); in intel_display_power_put()
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| /linux-5.19.10/drivers/gpu/drm/i915/gem/ |
| D | i915_gem_stolen.c | 36 int i915_gem_stolen_insert_node_in_range(struct drm_i915_private *i915, in i915_gem_stolen_insert_node_in_range() argument
42 if (!drm_mm_initialized(&i915->mm.stolen)) in i915_gem_stolen_insert_node_in_range()
46 if (GRAPHICS_VER(i915) >= 8 && start < 4096) in i915_gem_stolen_insert_node_in_range()
49 mutex_lock(&i915->mm.stolen_lock); in i915_gem_stolen_insert_node_in_range()
50 ret = drm_mm_insert_node_in_range(&i915->mm.stolen, node, in i915_gem_stolen_insert_node_in_range()
53 mutex_unlock(&i915->mm.stolen_lock); in i915_gem_stolen_insert_node_in_range()
58 int i915_gem_stolen_insert_node(struct drm_i915_private *i915, in i915_gem_stolen_insert_node() argument
62 return i915_gem_stolen_insert_node_in_range(i915, node, in i915_gem_stolen_insert_node()
68 void i915_gem_stolen_remove_node(struct drm_i915_private *i915, in i915_gem_stolen_remove_node() argument
71 mutex_lock(&i915->mm.stolen_lock); in i915_gem_stolen_remove_node()
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| D | i915_gem_pm.c | 23 void i915_gem_suspend(struct drm_i915_private *i915) in i915_gem_suspend() argument
25 GEM_TRACE("%s\n", dev_name(i915->drm.dev)); in i915_gem_suspend()
27 intel_wakeref_auto(&to_gt(i915)->ggtt->userfault_wakeref, 0); in i915_gem_suspend()
28 flush_workqueue(i915->wq); in i915_gem_suspend()
39 intel_gt_suspend_prepare(to_gt(i915)); in i915_gem_suspend()
41 i915_gem_drain_freed_objects(i915); in i915_gem_suspend()
44 static int lmem_restore(struct drm_i915_private *i915, u32 flags) in lmem_restore() argument
49 for_each_memory_region(mr, i915, id) { in lmem_restore()
60 static int lmem_suspend(struct drm_i915_private *i915, u32 flags) in lmem_suspend() argument
65 for_each_memory_region(mr, i915, id) { in lmem_suspend()
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| D | i915_gem_shrinker.c | 103 struct drm_i915_private *i915, in i915_gem_shrink() argument
112 { &i915->mm.purge_list, ~0u }, in i915_gem_shrink()
114 &i915->mm.shrink_list, in i915_gem_shrink()
125 bool trylock_vm = !ww && intel_vm_no_concurrent_access_wa(i915); in i915_gem_shrink()
127 trace_i915_gem_shrink(i915, target, shrink); in i915_gem_shrink()
135 wakeref = intel_runtime_pm_get_if_in_use(&i915->runtime_pm); in i915_gem_shrink()
152 intel_gt_retire_requests(to_gt(i915)); in i915_gem_shrink()
190 spin_lock_irqsave(&i915->mm.obj_lock, flags); in i915_gem_shrink()
211 spin_unlock_irqrestore(&i915->mm.obj_lock, flags); in i915_gem_shrink()
235 spin_lock_irqsave(&i915->mm.obj_lock, flags); in i915_gem_shrink()
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| /linux-5.19.10/drivers/gpu/drm/i915/gt/ |
| D | intel_workarounds.c | 285 struct drm_i915_private *i915 = engine->i915; in bdw_ctx_workarounds_init() local
307 (IS_BDW_GT3(i915) ? HDC_FENCE_DEST_SLM_DISABLE : 0)); in bdw_ctx_workarounds_init()
325 struct drm_i915_private *i915 = engine->i915; in gen9_ctx_workarounds_init() local
327 if (HAS_LLC(i915)) { in gen9_ctx_workarounds_init()
384 if (IS_SKYLAKE(i915) || in gen9_ctx_workarounds_init()
385 IS_KABYLAKE(i915) || in gen9_ctx_workarounds_init()
386 IS_COFFEELAKE(i915) || in gen9_ctx_workarounds_init()
387 IS_COMETLAKE(i915)) in gen9_ctx_workarounds_init()
414 if (IS_GEN9_LP(i915)) in gen9_ctx_workarounds_init()
482 struct drm_i915_private *i915 = engine->i915; in kbl_ctx_workarounds_init() local
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| D | intel_rps.c | 38 return rps_to_gt(rps)->i915; in rps_to_i915()
221 if (GRAPHICS_VER(gt->i915) >= 11) in rps_reset_interrupts()
241 intel_synchronize_irq(gt->i915); in rps_disable_interrupts()
271 struct drm_i915_private *i915 = rps_to_i915(rps); in gen5_rps_init() local
277 if (i915->fsb_freq <= 3200) in gen5_rps_init()
279 else if (i915->fsb_freq <= 4800) in gen5_rps_init()
285 if (cparams[i].i == c_m && cparams[i].t == i915->mem_freq) { in gen5_rps_init()
299 drm_dbg(&i915->drm, "fmax: %d, fmin: %d, fstart: %d\n", in gen5_rps_init()
370 static u32 pvid_to_extvid(struct drm_i915_private *i915, u8 pxvid) in pvid_to_extvid() argument
374 if (INTEL_INFO(i915)->is_mobile) in pvid_to_extvid()
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