124 skl_dram_get_dimm_info(struct drm_i915_private *i915,  in skl_dram_get_dimm_info()  argument
128 	if (GRAPHICS_VER(i915) >= 11) {  in skl_dram_get_dimm_info()
138 	drm_dbg_kms(&i915->drm,  in skl_dram_get_dimm_info()
145 skl_dram_get_channel_info(struct drm_i915_private *i915,  in skl_dram_get_channel_info()  argument
149 	skl_dram_get_dimm_info(i915, &ch->dimm_l,  in skl_dram_get_channel_info()
151 	skl_dram_get_dimm_info(i915, &ch->dimm_s,  in skl_dram_get_channel_info()
155 		drm_dbg_kms(&i915->drm, "CH%u not populated\n", channel);  in skl_dram_get_channel_info()
169 	drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb DIMMs: %s\n",  in skl_dram_get_channel_info()
185 skl_dram_get_channels_info(struct drm_i915_private *i915)  in skl_dram_get_channels_info()  argument
187 	struct dram_info *dram_info = &i915->dram_info;  in skl_dram_get_channels_info()
192 	val = intel_uncore_read(&i915->uncore,  in skl_dram_get_channels_info()
194 	ret = skl_dram_get_channel_info(i915, &ch0, 0, val);  in skl_dram_get_channels_info()
198 	val = intel_uncore_read(&i915->uncore,  in skl_dram_get_channels_info()
200 	ret = skl_dram_get_channel_info(i915, &ch1, 1, val);  in skl_dram_get_channels_info()
205 		drm_info(&i915->drm, "Number of memory channels is zero\n");  in skl_dram_get_channels_info()
210 		drm_info(&i915->drm, "couldn't get memory rank information\n");  in skl_dram_get_channels_info()
218 	drm_dbg_kms(&i915->drm, "Memory configuration is symmetric? %s\n",  in skl_dram_get_channels_info()
225 skl_get_dram_type(struct drm_i915_private *i915)  in skl_get_dram_type()  argument
229 	val = intel_uncore_read(&i915->uncore,  in skl_get_dram_type()
248 skl_get_dram_info(struct drm_i915_private *i915)  in skl_get_dram_info()  argument
250 	struct dram_info *dram_info = &i915->dram_info;  in skl_get_dram_info()
253 	dram_info->type = skl_get_dram_type(i915);  in skl_get_dram_info()
254 	drm_dbg_kms(&i915->drm, "DRAM type: %s\n",  in skl_get_dram_info()
257 	ret = skl_dram_get_channels_info(i915);  in skl_get_dram_info()
342 static int bxt_get_dram_info(struct drm_i915_private *i915)  in bxt_get_dram_info()  argument
344 	struct dram_info *dram_info = &i915->dram_info;  in bxt_get_dram_info()
356 		val = intel_uncore_read(&i915->uncore, BXT_D_CR_DRP0_DUNIT(i));  in bxt_get_dram_info()
365 		drm_WARN_ON(&i915->drm, type != INTEL_DRAM_UNKNOWN &&  in bxt_get_dram_info()
369 		drm_dbg_kms(&i915->drm,  in bxt_get_dram_info()
383 		drm_info(&i915->drm, "couldn't get memory information\n");  in bxt_get_dram_info()
452 static int gen11_get_dram_info(struct drm_i915_private *i915)  in gen11_get_dram_info()  argument
454 	int ret = skl_get_dram_info(i915);  in gen11_get_dram_info()
459 	return icl_pcode_read_mem_global_info(i915);  in gen11_get_dram_info()
462 static int gen12_get_dram_info(struct drm_i915_private *i915)  in gen12_get_dram_info()  argument
464 	i915->dram_info.wm_lv_0_adjust_needed = false;  in gen12_get_dram_info()
466 	return icl_pcode_read_mem_global_info(i915);  in gen12_get_dram_info()
469 void intel_dram_detect(struct drm_i915_private *i915)  in intel_dram_detect()  argument
471 	struct dram_info *dram_info = &i915->dram_info;  in intel_dram_detect()
474 	if (GRAPHICS_VER(i915) < 9 || IS_DG2(i915) || !HAS_DISPLAY(i915))  in intel_dram_detect()
481 	dram_info->wm_lv_0_adjust_needed = !IS_GEN9_LP(i915);  in intel_dram_detect()
483 	if (GRAPHICS_VER(i915) >= 12)  in intel_dram_detect()
484 		ret = gen12_get_dram_info(i915);  in intel_dram_detect()
485 	else if (GRAPHICS_VER(i915) >= 11)  in intel_dram_detect()
486 		ret = gen11_get_dram_info(i915);  in intel_dram_detect()
487 	else if (IS_GEN9_LP(i915))  in intel_dram_detect()
488 		ret = bxt_get_dram_info(i915);  in intel_dram_detect()
490 		ret = skl_get_dram_info(i915);  in intel_dram_detect()
494 	drm_dbg_kms(&i915->drm, "DRAM channels: %u\n", dram_info->num_channels);  in intel_dram_detect()
496 	drm_dbg_kms(&i915->drm, "Watermark level 0 adjustment needed: %s\n",  in intel_dram_detect()
500 static u32 gen9_edram_size_mb(struct drm_i915_private *i915, u32 cap)  in gen9_edram_size_mb()  argument
510 void intel_dram_edram_detect(struct drm_i915_private *i915)  in intel_dram_edram_detect()  argument
514 	if (!(IS_HASWELL(i915) || IS_BROADWELL(i915) || GRAPHICS_VER(i915) >= 9))  in intel_dram_edram_detect()
517 	edram_cap = __raw_uncore_read32(&i915->uncore, HSW_EDRAM_CAP);  in intel_dram_edram_detect()
528 	if (GRAPHICS_VER(i915) < 9)  in intel_dram_edram_detect()
529 		i915->edram_size_mb = 128;  in intel_dram_edram_detect()
531 		i915->edram_size_mb = gen9_edram_size_mb(i915, edram_cap);  in intel_dram_edram_detect()
533 	drm_info(&i915->drm, "Found %uMB of eDRAM\n", i915->edram_size_mb);  in intel_dram_edram_detect()