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Searched refs:gmc (Results 1 – 25 of 86) sorted by relevance

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/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_gmc.c51 u64 vram_size = adev->gmc.xgmi.node_segment_size * adev->gmc.xgmi.num_physical_nodes; in amdgpu_gmc_pdb0_alloc()
52 uint32_t pde0_page_shift = adev->gmc.vmid0_page_table_block_size + 21; in amdgpu_gmc_pdb0_alloc()
65 r = amdgpu_bo_create(adev, &bp, &adev->gmc.pdb0_bo); in amdgpu_gmc_pdb0_alloc()
69 r = amdgpu_bo_reserve(adev->gmc.pdb0_bo, false); in amdgpu_gmc_pdb0_alloc()
73 r = amdgpu_bo_pin(adev->gmc.pdb0_bo, AMDGPU_GEM_DOMAIN_VRAM); in amdgpu_gmc_pdb0_alloc()
76 r = amdgpu_bo_kmap(adev->gmc.pdb0_bo, &adev->gmc.ptr_pdb0); in amdgpu_gmc_pdb0_alloc()
80 amdgpu_bo_unreserve(adev->gmc.pdb0_bo); in amdgpu_gmc_pdb0_alloc()
84 amdgpu_bo_unpin(adev->gmc.pdb0_bo); in amdgpu_gmc_pdb0_alloc()
86 amdgpu_bo_unreserve(adev->gmc.pdb0_bo); in amdgpu_gmc_pdb0_alloc()
88 amdgpu_bo_unref(&adev->gmc.pdb0_bo); in amdgpu_gmc_pdb0_alloc()
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Dgmc_v9_0.c683 adev->gmc.vm_fault.num_types = 1; in gmc_v9_0_set_irq_funcs()
684 adev->gmc.vm_fault.funcs = &gmc_v9_0_irq_funcs; in gmc_v9_0_set_irq_funcs()
687 !adev->gmc.xgmi.connected_to_cpu) { in gmc_v9_0_set_irq_funcs()
688 adev->gmc.ecc_irq.num_types = 1; in gmc_v9_0_set_irq_funcs()
689 adev->gmc.ecc_irq.funcs = &gmc_v9_0_ecc_funcs; in gmc_v9_0_set_irq_funcs()
772 if (adev->gmc.xgmi.num_physical_nodes && in gmc_v9_0_flush_gpu_tlb()
802 spin_lock(&adev->gmc.invalidate_lock); in gmc_v9_0_flush_gpu_tlb()
872 spin_unlock(&adev->gmc.invalidate_lock); in gmc_v9_0_flush_gpu_tlb()
913 bool vega20_xgmi_wa = (adev->gmc.xgmi.num_physical_nodes && in gmc_v9_0_flush_gpu_tlb_pasid()
1097 if (!adev->gmc.translate_further) in gmc_v9_0_get_vm_pde()
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Dgmc_v11_0.c135 adev->gmc.vm_fault.num_types = 1; in gmc_v11_0_set_irq_funcs()
136 adev->gmc.vm_fault.funcs = &gmc_v11_0_irq_funcs; in gmc_v11_0_set_irq_funcs()
139 adev->gmc.ecc_irq.num_types = 1; in gmc_v11_0_set_irq_funcs()
140 adev->gmc.ecc_irq.funcs = &gmc_v11_0_ecc_funcs; in gmc_v11_0_set_irq_funcs()
185 spin_lock(&adev->gmc.invalidate_lock); in gmc_v11_0_flush_vm_hub()
242 spin_unlock(&adev->gmc.invalidate_lock); in gmc_v11_0_flush_vm_hub()
474 adev->gmc.vram_start; in gmc_v11_0_get_vm_pde()
477 if (!adev->gmc.translate_further) in gmc_v11_0_get_vm_pde()
533 adev->gmc.gmc_funcs = &gmc_v11_0_gmc_funcs; in gmc_v11_0_set_gmc_funcs()
575 adev->gmc.shared_aperture_start = 0x2000000000000000ULL; in gmc_v11_0_early_init()
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Dgmc_v10_0.c181 adev->gmc.vm_fault.num_types = 1; in gmc_v10_0_set_irq_funcs()
182 adev->gmc.vm_fault.funcs = &gmc_v10_0_irq_funcs; in gmc_v10_0_set_irq_funcs()
185 adev->gmc.ecc_irq.num_types = 1; in gmc_v10_0_set_irq_funcs()
186 adev->gmc.ecc_irq.funcs = &gmc_v10_0_ecc_funcs; in gmc_v10_0_set_irq_funcs()
240 spin_lock(&adev->gmc.invalidate_lock); in gmc_v10_0_flush_vm_hub()
298 spin_unlock(&adev->gmc.invalidate_lock); in gmc_v10_0_flush_vm_hub()
591 if (!adev->gmc.translate_further) in gmc_v10_0_get_vm_pde()
664 if (adev->gmc.gmc_funcs == NULL) in gmc_v10_0_set_gmc_funcs()
665 adev->gmc.gmc_funcs = &gmc_v10_0_gmc_funcs; in gmc_v10_0_set_gmc_funcs()
746 adev->gmc.shared_aperture_start = 0x2000000000000000ULL; in gmc_v10_0_early_init()
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Dgmc_v7_0.c159 err = request_firmware(&adev->gmc.fw, fw_name, adev->dev); in gmc_v7_0_init_microcode()
162 err = amdgpu_ucode_validate(adev->gmc.fw); in gmc_v7_0_init_microcode()
167 release_firmware(adev->gmc.fw); in gmc_v7_0_init_microcode()
168 adev->gmc.fw = NULL; in gmc_v7_0_init_microcode()
189 if (!adev->gmc.fw) in gmc_v7_0_mc_load_microcode()
192 hdr = (const struct mc_firmware_header_v1_0 *)adev->gmc.fw->data; in gmc_v7_0_mc_load_microcode()
195 adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version); in gmc_v7_0_mc_load_microcode()
198 (adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes)); in gmc_v7_0_mc_load_microcode()
201 (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in gmc_v7_0_mc_load_microcode()
291 adev->gmc.vram_start >> 12); in gmc_v7_0_mc_program()
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Dgmc_v8_0.c267 err = request_firmware(&adev->gmc.fw, fw_name, adev->dev); in gmc_v8_0_init_microcode()
270 err = amdgpu_ucode_validate(adev->gmc.fw); in gmc_v8_0_init_microcode()
275 release_firmware(adev->gmc.fw); in gmc_v8_0_init_microcode()
276 adev->gmc.fw = NULL; in gmc_v8_0_init_microcode()
305 if (!adev->gmc.fw) in gmc_v8_0_tonga_mc_load_microcode()
308 hdr = (const struct mc_firmware_header_v1_0 *)adev->gmc.fw->data; in gmc_v8_0_tonga_mc_load_microcode()
311 adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version); in gmc_v8_0_tonga_mc_load_microcode()
314 (adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes)); in gmc_v8_0_tonga_mc_load_microcode()
317 (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in gmc_v8_0_tonga_mc_load_microcode()
374 if (!adev->gmc.fw) in gmc_v8_0_polaris_mc_load_microcode()
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Dgmc_v6_0.c134 err = request_firmware(&adev->gmc.fw, fw_name, adev->dev); in gmc_v6_0_init_microcode()
138 err = amdgpu_ucode_validate(adev->gmc.fw); in gmc_v6_0_init_microcode()
145 release_firmware(adev->gmc.fw); in gmc_v6_0_init_microcode()
146 adev->gmc.fw = NULL; in gmc_v6_0_init_microcode()
159 if (!adev->gmc.fw) in gmc_v6_0_mc_load_microcode()
162 hdr = (const struct mc_firmware_header_v1_0 *)adev->gmc.fw->data; in gmc_v6_0_mc_load_microcode()
166 adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version); in gmc_v6_0_mc_load_microcode()
169 (adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes)); in gmc_v6_0_mc_load_microcode()
172 (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in gmc_v6_0_mc_load_microcode()
257 adev->gmc.vram_start >> 12); in gmc_v6_0_mc_program()
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Dgfxhub_v1_0.c58 if (adev->gmc.pdb0_bo) in gfxhub_v1_0_init_gart_aperture_regs()
59 pt_base = amdgpu_gmc_pd_addr(adev->gmc.pdb0_bo); in gfxhub_v1_0_init_gart_aperture_regs()
68 if (adev->gmc.pdb0_bo) { in gfxhub_v1_0_init_gart_aperture_regs()
70 (u32)(adev->gmc.fb_start >> 12)); in gfxhub_v1_0_init_gart_aperture_regs()
72 (u32)(adev->gmc.fb_start >> 44)); in gfxhub_v1_0_init_gart_aperture_regs()
75 (u32)(adev->gmc.gart_end >> 12)); in gfxhub_v1_0_init_gart_aperture_regs()
77 (u32)(adev->gmc.gart_end >> 44)); in gfxhub_v1_0_init_gart_aperture_regs()
80 (u32)(adev->gmc.gart_start >> 12)); in gfxhub_v1_0_init_gart_aperture_regs()
82 (u32)(adev->gmc.gart_start >> 44)); in gfxhub_v1_0_init_gart_aperture_regs()
85 (u32)(adev->gmc.gart_end >> 12)); in gfxhub_v1_0_init_gart_aperture_regs()
[all …]
Damdgpu_xgmi.c244 return sysfs_emit(buf, "%llu\n", adev->gmc.xgmi.node_id); in amdgpu_xgmi_show_device_id()
359 if (!adev->gmc.xgmi.hive_id) in amdgpu_get_xgmi_hive()
370 if (hive->hive_id == adev->gmc.xgmi.hive_id) in amdgpu_get_xgmi_hive()
414 hive->hive_id = adev->gmc.xgmi.hive_id; in amdgpu_get_xgmi_hive()
485 request_adev->gmc.xgmi.node_id, in amdgpu_xgmi_set_pstate()
486 request_adev->gmc.xgmi.hive_id, ret); in amdgpu_xgmi_set_pstate()
514 adev->gmc.xgmi.node_id, in amdgpu_xgmi_update_topology()
515 adev->gmc.xgmi.hive_id, ret); in amdgpu_xgmi_update_topology()
535 if (top->nodes[i].node_id == peer_adev->gmc.xgmi.node_id) in amdgpu_xgmi_get_hops_count()
547 if (top->nodes[i].node_id == peer_adev->gmc.xgmi.node_id) in amdgpu_xgmi_get_num_links()
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Dgfxhub_v1_1.c88 if (max_region || adev->gmc.xgmi.connected_to_cpu) { in gfxhub_v1_1_get_xgmi_info()
89 adev->gmc.xgmi.num_physical_nodes = max_region + 1; in gfxhub_v1_1_get_xgmi_info()
91 if (adev->gmc.xgmi.num_physical_nodes > max_num_physical_nodes) in gfxhub_v1_1_get_xgmi_info()
95 adev->gmc.xgmi.physical_node_id = in gfxhub_v1_1_get_xgmi_info()
99 adev->gmc.xgmi.physical_node_id = in gfxhub_v1_1_get_xgmi_info()
104 if (adev->gmc.xgmi.physical_node_id > max_physical_node_id) in gfxhub_v1_1_get_xgmi_info()
107 adev->gmc.xgmi.node_segment_size = seg_size; in gfxhub_v1_1_get_xgmi_info()
Damdgpu_gmc.h269 #define amdgpu_gmc_flush_gpu_tlb(adev, vmid, vmhub, type) ((adev)->gmc.gmc_funcs->flush_gpu_tlb((ad…
271 ((adev)->gmc.gmc_funcs->flush_gpu_tlb_pasid \
273 #define amdgpu_gmc_emit_flush_gpu_tlb(r, vmid, addr) (r)->adev->gmc.gmc_funcs->emit_flush_gpu_tlb((…
274 #define amdgpu_gmc_emit_pasid_mapping(r, vmid, pasid) (r)->adev->gmc.gmc_funcs->emit_pasid_mapping(…
275 #define amdgpu_gmc_map_mtype(adev, flags) (adev)->gmc.gmc_funcs->map_mtype((adev),(flags))
276 #define amdgpu_gmc_get_vm_pde(adev, level, dst, flags) (adev)->gmc.gmc_funcs->get_vm_pde((adev), (l…
277 #define amdgpu_gmc_get_vm_pte(adev, mapping, flags) (adev)->gmc.gmc_funcs->get_vm_pte((adev), (mapp…
278 #define amdgpu_gmc_get_vbios_fb_size(adev) (adev)->gmc.gmc_funcs->get_vbios_fb_size((adev))
288 static inline bool amdgpu_gmc_vram_full_visible(struct amdgpu_gmc *gmc) in amdgpu_gmc_vram_full_visible() argument
290 WARN_ON(gmc->real_vram_size < gmc->visible_vram_size); in amdgpu_gmc_vram_full_visible()
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Dgfxhub_v2_1.c144 (u32)(adev->gmc.gart_start >> 12)); in gfxhub_v2_1_init_gart_aperture_regs()
146 (u32)(adev->gmc.gart_start >> 44)); in gfxhub_v2_1_init_gart_aperture_regs()
149 (u32)(adev->gmc.gart_end >> 12)); in gfxhub_v2_1_init_gart_aperture_regs()
151 (u32)(adev->gmc.gart_end >> 44)); in gfxhub_v2_1_init_gart_aperture_regs()
160 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v2_1_init_system_aperture_regs()
161 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v2_1_init_system_aperture_regs()
165 min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18); in gfxhub_v2_1_init_system_aperture_regs()
167 max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18); in gfxhub_v2_1_init_system_aperture_regs()
236 if (adev->gmc.translate_further) { in gfxhub_v2_1_init_cache_regs()
323 !adev->gmc.noretry); in gfxhub_v2_1_setup_vmid_config()
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Dmmhub_v1_0.c48 adev->gmc.fb_start = base; in mmhub_v1_0_get_fb_location()
49 adev->gmc.fb_end = top; in mmhub_v1_0_get_fb_location()
75 (u32)(adev->gmc.gart_start >> 12)); in mmhub_v1_0_init_gart_aperture_regs()
77 (u32)(adev->gmc.gart_start >> 44)); in mmhub_v1_0_init_gart_aperture_regs()
80 (u32)(adev->gmc.gart_end >> 12)); in mmhub_v1_0_init_gart_aperture_regs()
82 (u32)(adev->gmc.gart_end >> 44)); in mmhub_v1_0_init_gart_aperture_regs()
92 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v1_0_init_system_aperture_regs()
93 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v1_0_init_system_aperture_regs()
97 min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18); in mmhub_v1_0_init_system_aperture_regs()
107 max((adev->gmc.fb_end >> 18) + 0x1, in mmhub_v1_0_init_system_aperture_regs()
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Dgfxhub_v2_0.c141 (u32)(adev->gmc.gart_start >> 12)); in gfxhub_v2_0_init_gart_aperture_regs()
143 (u32)(adev->gmc.gart_start >> 44)); in gfxhub_v2_0_init_gart_aperture_regs()
146 (u32)(adev->gmc.gart_end >> 12)); in gfxhub_v2_0_init_gart_aperture_regs()
148 (u32)(adev->gmc.gart_end >> 44)); in gfxhub_v2_0_init_gart_aperture_regs()
158 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v2_0_init_system_aperture_regs()
159 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v2_0_init_system_aperture_regs()
163 min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18); in gfxhub_v2_0_init_system_aperture_regs()
165 max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18); in gfxhub_v2_0_init_system_aperture_regs()
233 if (adev->gmc.translate_further) { in gfxhub_v2_0_init_cache_regs()
314 !adev->gmc.noretry); in gfxhub_v2_0_setup_vmid_config()
Dmmhub_v2_3.c140 (u32)(adev->gmc.gart_start >> 12)); in mmhub_v2_3_init_gart_aperture_regs()
142 (u32)(adev->gmc.gart_start >> 44)); in mmhub_v2_3_init_gart_aperture_regs()
145 (u32)(adev->gmc.gart_end >> 12)); in mmhub_v2_3_init_gart_aperture_regs()
147 (u32)(adev->gmc.gart_end >> 44)); in mmhub_v2_3_init_gart_aperture_regs()
157 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v2_3_init_system_aperture_regs()
158 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v2_3_init_system_aperture_regs()
162 min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18); in mmhub_v2_3_init_system_aperture_regs()
164 max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18); in mmhub_v2_3_init_system_aperture_regs()
228 if (adev->gmc.translate_further) { in mmhub_v2_3_init_cache_regs()
313 !adev->gmc.noretry); in mmhub_v2_3_setup_vmid_config()
[all …]
Damdgpu_vram_mgr.c65 return sysfs_emit(buf, "%llu\n", adev->gmc.real_vram_size); in amdgpu_mem_info_vram_total_show()
82 return sysfs_emit(buf, "%llu\n", adev->gmc.visible_vram_size); in amdgpu_mem_info_vis_vram_total_show()
138 switch (adev->gmc.vram_vendor) { in amdgpu_mem_info_vram_vendor()
202 if (start >= adev->gmc.visible_vram_size) in amdgpu_vram_mgr_vis_size()
205 return (end > adev->gmc.visible_vram_size ? in amdgpu_vram_mgr_vis_size()
206 adev->gmc.visible_vram_size : end) - start; in amdgpu_vram_mgr_vis_size()
225 if (amdgpu_gmc_vram_full_visible(&adev->gmc)) in amdgpu_vram_mgr_bo_visible_size()
228 if (res->start >= adev->gmc.visible_vram_size >> PAGE_SHIFT) in amdgpu_vram_mgr_bo_visible_size()
385 max_bytes = adev->gmc.mc_vram_size; in amdgpu_vram_mgr_new()
462 if (adev->gmc.xgmi.connected_to_cpu) in amdgpu_vram_mgr_new()
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Dmmhub_v1_7.c48 adev->gmc.fb_start = base; in mmhub_v1_7_get_fb_location()
49 adev->gmc.fb_end = top; in mmhub_v1_7_get_fb_location()
70 if (adev->gmc.pdb0_bo) in mmhub_v1_7_init_gart_aperture_regs()
71 pt_base = amdgpu_gmc_pd_addr(adev->gmc.pdb0_bo); in mmhub_v1_7_init_gart_aperture_regs()
80 if (adev->gmc.pdb0_bo) { in mmhub_v1_7_init_gart_aperture_regs()
82 (u32)(adev->gmc.fb_start >> 12)); in mmhub_v1_7_init_gart_aperture_regs()
84 (u32)(adev->gmc.fb_start >> 44)); in mmhub_v1_7_init_gart_aperture_regs()
87 (u32)(adev->gmc.gart_end >> 12)); in mmhub_v1_7_init_gart_aperture_regs()
89 (u32)(adev->gmc.gart_end >> 44)); in mmhub_v1_7_init_gart_aperture_regs()
93 (u32)(adev->gmc.gart_start >> 12)); in mmhub_v1_7_init_gart_aperture_regs()
[all …]
Damdgpu_xgmi.h72 adev->gmc.xgmi.hive_id && in amdgpu_xgmi_same_hive()
73 adev->gmc.xgmi.hive_id == bo_adev->gmc.xgmi.hive_id); in amdgpu_xgmi_same_hive()
Dmmhub_v2_0.c210 (u32)(adev->gmc.gart_start >> 12)); in mmhub_v2_0_init_gart_aperture_regs()
212 (u32)(adev->gmc.gart_start >> 44)); in mmhub_v2_0_init_gart_aperture_regs()
215 (u32)(adev->gmc.gart_end >> 12)); in mmhub_v2_0_init_gart_aperture_regs()
217 (u32)(adev->gmc.gart_end >> 44)); in mmhub_v2_0_init_gart_aperture_regs()
228 WREG32_SOC15_RLC(MMHUB, 0, mmMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v2_0_init_system_aperture_regs()
229 WREG32_SOC15_RLC(MMHUB, 0, mmMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v2_0_init_system_aperture_regs()
233 min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18); in mmhub_v2_0_init_system_aperture_regs()
235 max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18); in mmhub_v2_0_init_system_aperture_regs()
306 if (adev->gmc.translate_further) { in mmhub_v2_0_init_cache_regs()
397 !adev->gmc.noretry); in mmhub_v2_0_setup_vmid_config()
Dgfxhub_v3_0.c143 (u32)(adev->gmc.gart_start >> 12)); in gfxhub_v3_0_init_gart_aperture_regs()
145 (u32)(adev->gmc.gart_start >> 44)); in gfxhub_v3_0_init_gart_aperture_regs()
148 (u32)(adev->gmc.gart_end >> 12)); in gfxhub_v3_0_init_gart_aperture_regs()
150 (u32)(adev->gmc.gart_end >> 44)); in gfxhub_v3_0_init_gart_aperture_regs()
164 adev->gmc.vram_start >> 18); in gfxhub_v3_0_init_system_aperture_regs()
166 adev->gmc.vram_end >> 18); in gfxhub_v3_0_init_system_aperture_regs()
169 value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start in gfxhub_v3_0_init_system_aperture_regs()
237 if (adev->gmc.translate_further) { in gfxhub_v3_0_init_cache_regs()
364 adev->gmc.vram_start >> 24); in gfxhub_v3_0_gart_enable()
366 adev->gmc.vram_end >> 24); in gfxhub_v3_0_gart_enable()
Damdgpu_object.c133 unsigned visible_pfn = adev->gmc.visible_vram_size >> PAGE_SHIFT; in amdgpu_bo_placement_from_domain()
600 if (!amdgpu_gmc_vram_full_visible(&adev->gmc) && in amdgpu_bo_create()
602 bo->tbo.resource->start < adev->gmc.visible_vram_size >> PAGE_SHIFT) in amdgpu_bo_create()
1043 if (!adev->gmc.xgmi.connected_to_cpu) { in amdgpu_bo_init()
1045 int r = arch_io_reserve_memtype_wc(adev->gmc.aper_base, in amdgpu_bo_init()
1046 adev->gmc.aper_size); in amdgpu_bo_init()
1054 adev->gmc.vram_mtrr = arch_phys_wc_add(adev->gmc.aper_base, in amdgpu_bo_init()
1055 adev->gmc.aper_size); in amdgpu_bo_init()
1059 adev->gmc.mc_vram_size >> 20, in amdgpu_bo_init()
1060 (unsigned long long)adev->gmc.aper_size >> 20); in amdgpu_bo_init()
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Damdgpu_ttm.c138 } else if (!amdgpu_gmc_vram_full_visible(&adev->gmc) && in amdgpu_evict_flags()
150 abo->placements[0].fpfn = adev->gmc.visible_vram_size >> PAGE_SHIFT; in amdgpu_evict_flags()
224 *addr = adev->gmc.gart_start; in amdgpu_ttm_map_buffer()
442 return cursor.start + cursor.size <= adev->gmc.visible_vram_size; in amdgpu_mem_visible()
575 if ((mem->bus.offset + bus_size) > adev->gmc.visible_vram_size) in amdgpu_ttm_io_mem_reserve()
583 mem->bus.offset += adev->gmc.aper_base; in amdgpu_ttm_io_mem_reserve()
600 return (adev->gmc.aper_base + cursor.start) >> PAGE_SHIFT; in amdgpu_ttm_io_mem_pfn()
616 return adev->gmc.gart_start; in amdgpu_ttm_domain_start()
618 return adev->gmc.vram_start; in amdgpu_ttm_domain_start()
952 placements.lpfn = adev->gmc.gart_size >> PAGE_SHIFT; in amdgpu_ttm_alloc_gart()
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Damdgpu_amdkfd.c78 amdgpu_amdkfd_total_mem_size += adev->gmc.real_vram_size; in amdgpu_amdkfd_device_probe()
412 mem_info->local_mem_size_public = adev->gmc.visible_vram_size; in amdgpu_amdkfd_get_local_mem_info()
413 mem_info->local_mem_size_private = adev->gmc.real_vram_size - in amdgpu_amdkfd_get_local_mem_info()
414 adev->gmc.visible_vram_size; in amdgpu_amdkfd_get_local_mem_info()
416 mem_info->vram_width = adev->gmc.vram_width; in amdgpu_amdkfd_get_local_mem_info()
419 &adev->gmc.aper_base, in amdgpu_amdkfd_get_local_mem_info()
537 adev->gmc.xgmi.physical_node_id, in amdgpu_amdkfd_get_xgmi_hops_count()
538 peer_adev->gmc.xgmi.physical_node_id, ret); in amdgpu_amdkfd_get_xgmi_hops_count()
561 adev->gmc.xgmi.physical_node_id, in amdgpu_amdkfd_get_xgmi_bandwidth_mbytes()
562 peer_adev->gmc.xgmi.physical_node_id, num_links); in amdgpu_amdkfd_get_xgmi_bandwidth_mbytes()
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Dmmhub_v3_0_2.c150 (u32)(adev->gmc.gart_start >> 12)); in mmhub_v3_0_2_init_gart_aperture_regs()
152 (u32)(adev->gmc.gart_start >> 44)); in mmhub_v3_0_2_init_gart_aperture_regs()
155 (u32)(adev->gmc.gart_end >> 12)); in mmhub_v3_0_2_init_gart_aperture_regs()
157 (u32)(adev->gmc.gart_end >> 44)); in mmhub_v3_0_2_init_gart_aperture_regs()
178 adev->gmc.vram_start >> 18); in mmhub_v3_0_2_init_system_aperture_regs()
180 adev->gmc.vram_end >> 18); in mmhub_v3_0_2_init_system_aperture_regs()
184 value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start + in mmhub_v3_0_2_init_system_aperture_regs()
253 if (adev->gmc.translate_further) { in mmhub_v3_0_2_init_cache_regs()
/linux-5.19.10/drivers/video/fbdev/
Dw100fb.c296 union dp_gui_master_cntl_u gmc; in w100_init_graphic_engine() local
322 gmc.val = 0; in w100_init_graphic_engine()
323 gmc.f.gmc_src_pitch_offset_cntl = 1; in w100_init_graphic_engine()
324 gmc.f.gmc_dst_pitch_offset_cntl = 1; in w100_init_graphic_engine()
325 gmc.f.gmc_src_clipping = 1; in w100_init_graphic_engine()
326 gmc.f.gmc_dst_clipping = 1; in w100_init_graphic_engine()
327 gmc.f.gmc_brush_datatype = GMC_BRUSH_NONE; in w100_init_graphic_engine()
328 gmc.f.gmc_dst_datatype = 3; /* from DstType_16Bpp_444 */ in w100_init_graphic_engine()
329 gmc.f.gmc_src_datatype = SRC_DATATYPE_EQU_DST; in w100_init_graphic_engine()
330 gmc.f.gmc_byte_pix_order = 1; in w100_init_graphic_engine()
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