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Searched refs:clk_pll (Results 1 – 25 of 44) sorted by relevance

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/linux-5.19.10/drivers/clk/mxs/
Dclk-pll.c23 struct clk_pll { struct
30 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw) argument
34 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_prepare()
45 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_unprepare()
52 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_enable()
61 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_disable()
69 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate()
85 struct clk_pll *pll; in mxs_clk_pll()
/linux-5.19.10/arch/m68k/coldfire/
Dm523x.c32 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
34 CLKDEV_INIT("mcfpit.0", NULL, &clk_pll),
35 CLKDEV_INIT("mcfpit.1", NULL, &clk_pll),
36 CLKDEV_INIT("mcfpit.2", NULL, &clk_pll),
37 CLKDEV_INIT("mcfpit.3", NULL, &clk_pll),
Dm528x.c34 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
36 CLKDEV_INIT("mcfpit.0", NULL, &clk_pll),
37 CLKDEV_INIT("mcfpit.1", NULL, &clk_pll),
38 CLKDEV_INIT("mcfpit.2", NULL, &clk_pll),
39 CLKDEV_INIT("mcfpit.3", NULL, &clk_pll),
Dm527x.c33 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
35 CLKDEV_INIT("mcfpit.0", NULL, &clk_pll),
36 CLKDEV_INIT("mcfpit.1", NULL, &clk_pll),
37 CLKDEV_INIT("mcfpit.2", NULL, &clk_pll),
38 CLKDEV_INIT("mcfpit.3", NULL, &clk_pll),
Dm5407.c29 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
Dm5206.c29 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
Dm5307.c38 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
Dm54xx.c38 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
Dm525x.c29 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
Dm5272.c40 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
Dm5249.c29 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
/linux-5.19.10/drivers/clk/at91/
Dclk-pll.c32 #define to_clk_pll(hw) container_of(hw, struct clk_pll, hw)
34 struct clk_pll { struct
57 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_prepare() argument
100 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_is_prepared()
107 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_unprepare()
116 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate()
124 static long clk_pll_get_best_div_mul(struct clk_pll *pll, unsigned long rate, in clk_pll_get_best_div_mul()
237 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_round_rate()
246 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_set_rate()
266 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_save_context()
[all …]
/linux-5.19.10/drivers/clk/qcom/
Dclk-pll.c26 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_enable()
67 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_disable()
82 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate()
128 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_determine_rate()
143 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_set_rate()
179 static int wait_for_pll(struct clk_pll *pll) in wait_for_pll()
203 struct clk_pll *p = to_clk_pll(clk_hw_get_parent(hw)); in clk_pll_vote_enable()
218 static void clk_pll_configure(struct clk_pll *pll, struct regmap *regmap, in clk_pll_configure()
245 void clk_pll_configure_sr(struct clk_pll *pll, struct regmap *regmap, in clk_pll_configure_sr()
254 void clk_pll_configure_sr_hpm_lp(struct clk_pll *pll, struct regmap *regmap, in clk_pll_configure_sr_hpm_lp()
[all …]
Dclk-pll.h39 struct clk_pll { struct
59 #define to_clk_pll(_hw) container_of(to_clk_regmap(_hw), struct clk_pll, clkr) argument
76 void clk_pll_configure_sr(struct clk_pll *pll, struct regmap *regmap,
78 void clk_pll_configure_sr_hpm_lp(struct clk_pll *pll, struct regmap *regmap,
/linux-5.19.10/Documentation/devicetree/bindings/clock/
Dmoxa,moxart-clock.txt37 clk_pll: clk_pll@98100000 {
47 clocks = <&clk_pll>;
/linux-5.19.10/drivers/clk/
Dclk-nomadik.c142 struct clk_pll { struct
161 #define to_pll(_hw) container_of(_hw, struct clk_pll, hw) argument
166 struct clk_pll *pll = to_pll(hw); in pll_clk_enable()
186 struct clk_pll *pll = to_pll(hw); in pll_clk_disable()
205 struct clk_pll *pll = to_pll(hw); in pll_clk_is_enabled()
221 struct clk_pll *pll = to_pll(hw); in pll_clk_recalc_rate()
261 struct clk_pll *pll; in pll_clk_register()
Dclk-vt8500.c41 struct clk_pll { struct
308 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw)
549 struct clk_pll *pll = to_clk_pll(hw); in vtwm_pll_set_rate()
600 struct clk_pll *pll = to_clk_pll(hw); in vtwm_pll_round_rate()
639 struct clk_pll *pll = to_clk_pll(hw); in vtwm_pll_recalc_rate()
677 struct clk_pll *pll_clk; in vtwm_pll_clk_init()
Dclk-versaclock5.c195 struct vc5_hw_data clk_pll; member
1046 vc5->clk_pll.num = 0; in vc5_probe()
1047 vc5->clk_pll.vc5 = vc5; in vc5_probe()
1048 vc5->clk_pll.hw.init = &init; in vc5_probe()
1049 ret = devm_clk_hw_register(&client->dev, &vc5->clk_pll.hw); in vc5_probe()
1063 parent_names[0] = clk_hw_get_name(&vc5->clk_pll.hw); in vc5_probe()
/linux-5.19.10/drivers/clk/spear/
Dclk-vco-pll.c66 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw)
87 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_round_rate_index()
127 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate()
147 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_set_rate()
283 struct clk_pll *pll; in clk_register_vco_pll()
Dclk.h102 struct clk_pll { struct
/linux-5.19.10/drivers/clk/keystone/
Dpll.c68 struct clk_pll { struct
73 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw) argument
78 struct clk_pll *pll = to_clk_pll(hw); in clk_pllclk_recalc()
126 struct clk_pll *pll; in clk_register_pll()
/linux-5.19.10/arch/arm/boot/dts/
Dmoxart.dtsi47 clk_pll: clk_pll@98100000 { label
57 clocks = <&clk_pll>;
Dmoxart-uc7112lx.dts78 &clk_pll {
/linux-5.19.10/drivers/gpu/drm/imx/
Dimx-ldb.c101 struct clk *clk_pll[2]; /* upstream clock we can adjust */ member
170 clk_get_rate(ldb->clk_pll[chno]), serial_clk); in imx_ldb_set_clock()
171 clk_set_rate(ldb->clk_pll[chno], serial_clk); in imx_ldb_set_clock()
174 clk_get_rate(ldb->clk_pll[chno])); in imx_ldb_set_clock()
426 ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname); in imx_ldb_get_clk()
428 return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]); in imx_ldb_get_clk()
/linux-5.19.10/drivers/staging/most/dim2/
Ddim2.c92 struct clk *clk_pll; member
939 dev->clk_pll = devm_clk_get(&pdev->dev, "pll8_mlb"); in fsl_mx6_enable()
940 if (IS_ERR_OR_NULL(dev->clk_pll)) { in fsl_mx6_enable()
947 clk_prepare_enable(dev->clk_pll); in fsl_mx6_enable()
958 clk_disable_unprepare(dev->clk_pll); in fsl_mx6_disable()

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