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/linux-5.19.10/drivers/bcma/
Ddriver_chipcommon.c18 static inline u32 bcma_cc_write32_masked(struct bcma_drv_cc *cc, u16 offset, in bcma_cc_write32_masked() argument
22 value |= bcma_cc_read32(cc, offset) & ~mask; in bcma_cc_write32_masked()
23 bcma_cc_write32(cc, offset, value); in bcma_cc_write32_masked()
28 u32 bcma_chipco_get_alp_clock(struct bcma_drv_cc *cc) in bcma_chipco_get_alp_clock() argument
30 if (cc->capabilities & BCMA_CC_CAP_PMU) in bcma_chipco_get_alp_clock()
31 return bcma_pmu_get_alp_clock(cc); in bcma_chipco_get_alp_clock()
37 static bool bcma_core_cc_has_pmu_watchdog(struct bcma_drv_cc *cc) in bcma_core_cc_has_pmu_watchdog() argument
39 struct bcma_bus *bus = cc->core->bus; in bcma_core_cc_has_pmu_watchdog()
41 if (cc->capabilities & BCMA_CC_CAP_PMU) { in bcma_core_cc_has_pmu_watchdog()
56 static u32 bcma_chipco_watchdog_get_max_timer(struct bcma_drv_cc *cc) in bcma_chipco_watchdog_get_max_timer() argument
[all …]
Ddriver_chipcommon_pmu.c16 u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset) in bcma_chipco_pll_read() argument
18 bcma_pmu_write32(cc, BCMA_CC_PMU_PLLCTL_ADDR, offset); in bcma_chipco_pll_read()
19 bcma_pmu_read32(cc, BCMA_CC_PMU_PLLCTL_ADDR); in bcma_chipco_pll_read()
20 return bcma_pmu_read32(cc, BCMA_CC_PMU_PLLCTL_DATA); in bcma_chipco_pll_read()
24 void bcma_chipco_pll_write(struct bcma_drv_cc *cc, u32 offset, u32 value) in bcma_chipco_pll_write() argument
26 bcma_pmu_write32(cc, BCMA_CC_PMU_PLLCTL_ADDR, offset); in bcma_chipco_pll_write()
27 bcma_pmu_read32(cc, BCMA_CC_PMU_PLLCTL_ADDR); in bcma_chipco_pll_write()
28 bcma_pmu_write32(cc, BCMA_CC_PMU_PLLCTL_DATA, value); in bcma_chipco_pll_write()
32 void bcma_chipco_pll_maskset(struct bcma_drv_cc *cc, u32 offset, u32 mask, in bcma_chipco_pll_maskset() argument
35 bcma_pmu_write32(cc, BCMA_CC_PMU_PLLCTL_ADDR, offset); in bcma_chipco_pll_maskset()
[all …]
Ddriver_gpio.c24 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_get_value() local
26 return !!bcma_chipco_gpio_in(cc, 1 << gpio); in bcma_gpio_get_value()
32 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_set_value() local
34 bcma_chipco_gpio_out(cc, 1 << gpio, value ? 1 << gpio : 0); in bcma_gpio_set_value()
39 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_direction_input() local
41 bcma_chipco_gpio_outen(cc, 1 << gpio, 0); in bcma_gpio_direction_input()
48 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_direction_output() local
50 bcma_chipco_gpio_outen(cc, 1 << gpio, 1 << gpio); in bcma_gpio_direction_output()
51 bcma_chipco_gpio_out(cc, 1 << gpio, value ? 1 << gpio : 0); in bcma_gpio_direction_output()
57 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_request() local
[all …]
Ddriver_chipcommon_nflash.c28 int bcma_nflash_init(struct bcma_drv_cc *cc) in bcma_nflash_init() argument
30 struct bcma_bus *bus = cc->core->bus; in bcma_nflash_init()
34 cc->core->id.rev != 38) { in bcma_nflash_init()
39 if (!(cc->capabilities & BCMA_CC_CAP_NFLASH)) { in bcma_nflash_init()
44 cc->nflash.present = true; in bcma_nflash_init()
45 if (cc->core->id.rev == 38 && in bcma_nflash_init()
46 (cc->status & BCMA_CC_CHIPST_5357_NAND_BOOT)) { in bcma_nflash_init()
47 cc->nflash.boot = true; in bcma_nflash_init()
49 reg = bcma_cc_read32(cc, BCMA_CC_NAND_CS_NAND_SELECT) & 0xff; in bcma_nflash_init()
50 cc->nflash.brcmnand_info.chip_select = ffs(reg) - 1; in bcma_nflash_init()
[all …]
Dbcma_private.h45 void bcma_core_chipcommon_early_init(struct bcma_drv_cc *cc);
46 void bcma_core_chipcommon_init(struct bcma_drv_cc *cc);
47 void bcma_chipco_bcm4331_ext_pa_lines_ctl(struct bcma_drv_cc *cc, bool enable);
49 void bcma_chipco_serial_init(struct bcma_drv_cc *cc);
57 void bcma_pmu_early_init(struct bcma_drv_cc *cc);
58 void bcma_pmu_init(struct bcma_drv_cc *cc);
59 u32 bcma_pmu_get_alp_clock(struct bcma_drv_cc *cc);
60 u32 bcma_pmu_get_cpu_clock(struct bcma_drv_cc *cc);
68 int bcma_pflash_init(struct bcma_drv_cc *cc);
70 static inline int bcma_pflash_init(struct bcma_drv_cc *cc) in bcma_pflash_init() argument
[all …]
Ddriver_chipcommon_sflash.c74 static void bcma_sflash_cmd(struct bcma_drv_cc *cc, u32 opcode) in bcma_sflash_cmd() argument
77 bcma_cc_write32(cc, BCMA_CC_FLASHCTL, in bcma_sflash_cmd()
80 if (!(bcma_cc_read32(cc, BCMA_CC_FLASHCTL) & in bcma_sflash_cmd()
85 bcma_err(cc->core->bus, "SFLASH control command failed (timeout)!\n"); in bcma_sflash_cmd()
89 int bcma_sflash_init(struct bcma_drv_cc *cc) in bcma_sflash_init() argument
91 struct bcma_bus *bus = cc->core->bus; in bcma_sflash_init()
92 struct bcma_sflash *sflash = &cc->sflash; in bcma_sflash_init()
96 switch (cc->capabilities & BCMA_CC_CAP_FLASHT) { in bcma_sflash_init()
98 bcma_sflash_cmd(cc, BCMA_CC_FLASHCTL_ST_DP); in bcma_sflash_init()
100 bcma_cc_write32(cc, BCMA_CC_FLASHADDR, 0); in bcma_sflash_init()
[all …]
/linux-5.19.10/drivers/ssb/
Ddriver_chipcommon.c32 static inline u32 chipco_write32_masked(struct ssb_chipcommon *cc, u16 offset, in chipco_write32_masked() argument
36 value |= chipco_read32(cc, offset) & ~mask; in chipco_write32_masked()
37 chipco_write32(cc, offset, value); in chipco_write32_masked()
42 void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc, in ssb_chipco_set_clockmode() argument
45 struct ssb_device *ccdev = cc->dev; in ssb_chipco_set_clockmode()
57 if (cc->capabilities & SSB_CHIPCO_CAP_PMU) in ssb_chipco_set_clockmode()
69 if (!(cc->capabilities & SSB_CHIPCO_CAP_PCTL)) in ssb_chipco_set_clockmode()
74 tmp = chipco_read32(cc, SSB_CHIPCO_SLOWCLKCTL); in ssb_chipco_set_clockmode()
76 chipco_write32(cc, SSB_CHIPCO_SLOWCLKCTL, tmp); in ssb_chipco_set_clockmode()
81 tmp = chipco_read32(cc, SSB_CHIPCO_SLOWCLKCTL); in ssb_chipco_set_clockmode()
[all …]
Ddriver_chipcommon_pmu.c22 static u32 ssb_chipco_pll_read(struct ssb_chipcommon *cc, u32 offset) in ssb_chipco_pll_read() argument
24 chipco_write32(cc, SSB_CHIPCO_PLLCTL_ADDR, offset); in ssb_chipco_pll_read()
25 return chipco_read32(cc, SSB_CHIPCO_PLLCTL_DATA); in ssb_chipco_pll_read()
28 static void ssb_chipco_pll_write(struct ssb_chipcommon *cc, in ssb_chipco_pll_write() argument
31 chipco_write32(cc, SSB_CHIPCO_PLLCTL_ADDR, offset); in ssb_chipco_pll_write()
32 chipco_write32(cc, SSB_CHIPCO_PLLCTL_DATA, value); in ssb_chipco_pll_write()
35 static void ssb_chipco_regctl_maskset(struct ssb_chipcommon *cc, in ssb_chipco_regctl_maskset() argument
40 chipco_read32(cc, SSB_CHIPCO_REGCTL_ADDR); in ssb_chipco_regctl_maskset()
41 chipco_write32(cc, SSB_CHIPCO_REGCTL_ADDR, offset); in ssb_chipco_regctl_maskset()
42 chipco_read32(cc, SSB_CHIPCO_REGCTL_ADDR); in ssb_chipco_regctl_maskset()
[all …]
Ddriver_chipcommon_sflash.c72 static void ssb_sflash_cmd(struct ssb_chipcommon *cc, u32 opcode) in ssb_sflash_cmd() argument
75 chipco_write32(cc, SSB_CHIPCO_FLASHCTL, in ssb_sflash_cmd()
78 if (!(chipco_read32(cc, SSB_CHIPCO_FLASHCTL) & in ssb_sflash_cmd()
83 dev_err(cc->dev->dev, "SFLASH control command failed (timeout)!\n"); in ssb_sflash_cmd()
87 int ssb_sflash_init(struct ssb_chipcommon *cc) in ssb_sflash_init() argument
89 struct ssb_sflash *sflash = &cc->dev->bus->mipscore.sflash; in ssb_sflash_init()
93 switch (cc->capabilities & SSB_CHIPCO_CAP_FLASHT) { in ssb_sflash_init()
95 ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_DP); in ssb_sflash_init()
97 chipco_write32(cc, SSB_CHIPCO_FLASHADDR, 0); in ssb_sflash_init()
98 ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_RES); in ssb_sflash_init()
[all …]
/linux-5.19.10/drivers/md/
Ddm-crypt.c71 struct crypt_config *cc; member
97 int (*ctr)(struct crypt_config *cc, struct dm_target *ti,
99 void (*dtr)(struct crypt_config *cc);
100 int (*init)(struct crypt_config *cc);
101 int (*wipe)(struct crypt_config *cc);
102 int (*generator)(struct crypt_config *cc, u8 *iv,
104 int (*post)(struct crypt_config *cc, u8 *iv,
239 static struct scatterlist *crypt_get_sg_data(struct crypt_config *cc,
242 static bool crypt_integrity_aead(struct crypt_config *cc);
247 static struct crypto_skcipher *any_tfm(struct crypt_config *cc) in any_tfm() argument
[all …]
/linux-5.19.10/arch/s390/pci/
Dpci_insn.c23 u8 cc; member
37 static inline void zpci_err_insn_req(int lvl, u8 insn, u8 cc, u8 status, in zpci_err_insn_req() argument
41 .insn = insn, .cc = cc, .status = status, in zpci_err_insn_req()
47 static inline void zpci_err_insn_addr(int lvl, u8 insn, u8 cc, u8 status, in zpci_err_insn_addr() argument
51 .insn = insn, .cc = cc, .status = status, in zpci_err_insn_addr()
60 u8 cc; in __mpcifc() local
66 : [cc] "=d" (cc), [req] "+d" (req), [fib] "+Q" (*fib) in __mpcifc()
69 return cc; in __mpcifc()
75 u8 cc; in zpci_mod_fc() local
78 cc = __mpcifc(req, fib, status); in zpci_mod_fc()
[all …]
/linux-5.19.10/fs/f2fs/
Dcompress.c52 int (*init_compress_ctx)(struct compress_ctx *cc);
53 void (*destroy_compress_ctx)(struct compress_ctx *cc);
54 int (*compress_pages)(struct compress_ctx *cc);
60 static unsigned int offset_in_cluster(struct compress_ctx *cc, pgoff_t index) in offset_in_cluster() argument
62 return index & (cc->cluster_size - 1); in offset_in_cluster()
65 static pgoff_t cluster_idx(struct compress_ctx *cc, pgoff_t index) in cluster_idx() argument
67 return index >> cc->log_cluster_size; in cluster_idx()
70 static pgoff_t start_idx_of_cluster(struct compress_ctx *cc) in start_idx_of_cluster() argument
72 return cc->cluster_idx << cc->log_cluster_size; in start_idx_of_cluster()
99 static void f2fs_drop_rpages(struct compress_ctx *cc, int len, bool unlock) in f2fs_drop_rpages() argument
[all …]
/linux-5.19.10/mm/
Dcompaction.c221 static inline bool isolation_suitable(struct compact_control *cc, in isolation_suitable() argument
224 if (cc->ignore_skip_hint) in isolation_suitable()
401 static bool test_and_set_skip(struct compact_control *cc, struct page *page, in test_and_set_skip() argument
407 if (cc->ignore_skip_hint) in test_and_set_skip()
414 if (!skip && !cc->no_set_skip_hint) in test_and_set_skip()
420 static void update_cached_migrate(struct compact_control *cc, unsigned long pfn) in update_cached_migrate() argument
422 struct zone *zone = cc->zone; in update_cached_migrate()
427 if (cc->no_set_skip_hint) in update_cached_migrate()
432 if (cc->mode != MIGRATE_ASYNC && in update_cached_migrate()
441 static void update_pageblock_skip(struct compact_control *cc, in update_pageblock_skip() argument
[all …]
/linux-5.19.10/drivers/s390/cio/
Dtrace.h25 TP_PROTO(struct subchannel_id schid, struct schib *schib, int cc),
26 TP_ARGS(schid, schib, cc),
44 __field(int, cc)
63 __entry->cc = cc;
68 __entry->cssid, __entry->ssid, __entry->schno, __entry->cc,
85 TP_PROTO(struct subchannel_id schid, struct schib *schib, int cc),
86 TP_ARGS(schid, schib, cc)
96 TP_PROTO(struct subchannel_id schid, struct schib *schib, int cc),
97 TP_ARGS(schid, schib, cc)
107 TP_PROTO(struct subchannel_id schid, struct irb *irb, int cc),
[all …]
/linux-5.19.10/drivers/mtd/nand/raw/bcm47xxnflash/
Dops_bcm4706.c43 static int bcm47xxnflash_ops_bcm4706_ctl_cmd(struct bcma_drv_cc *cc, u32 code) in bcm47xxnflash_ops_bcm4706_ctl_cmd() argument
47 bcma_cc_write32(cc, BCMA_CC_NFLASH_CTL, NCTL_START | code); in bcm47xxnflash_ops_bcm4706_ctl_cmd()
49 if (!(bcma_cc_read32(cc, BCMA_CC_NFLASH_CTL) & NCTL_START)) { in bcm47xxnflash_ops_bcm4706_ctl_cmd()
61 static int bcm47xxnflash_ops_bcm4706_poll(struct bcma_drv_cc *cc) in bcm47xxnflash_ops_bcm4706_poll() argument
66 if (bcma_cc_read32(cc, BCMA_CC_NFLASH_CTL) & NCTL_READY) { in bcm47xxnflash_ops_bcm4706_poll()
67 if (bcma_cc_read32(cc, BCMA_CC_NFLASH_CTL) & in bcm47xxnflash_ops_bcm4706_poll()
105 bcma_cc_write32(b47n->cc, BCMA_CC_NFLASH_COL_ADDR, in bcm47xxnflash_ops_bcm4706_read()
107 bcma_cc_write32(b47n->cc, BCMA_CC_NFLASH_ROW_ADDR, in bcm47xxnflash_ops_bcm4706_read()
114 if (bcm47xxnflash_ops_bcm4706_ctl_cmd(b47n->cc, ctlcode)) in bcm47xxnflash_ops_bcm4706_read()
116 if (bcm47xxnflash_ops_bcm4706_poll(b47n->cc)) in bcm47xxnflash_ops_bcm4706_read()
[all …]
/linux-5.19.10/drivers/clk/sprd/
Dcomposite.c15 struct sprd_comp *cc = hw_to_sprd_comp(hw); in sprd_comp_round_rate() local
17 return sprd_div_helper_round_rate(&cc->common, &cc->div, in sprd_comp_round_rate()
24 struct sprd_comp *cc = hw_to_sprd_comp(hw); in sprd_comp_recalc_rate() local
26 return sprd_div_helper_recalc_rate(&cc->common, &cc->div, parent_rate); in sprd_comp_recalc_rate()
32 struct sprd_comp *cc = hw_to_sprd_comp(hw); in sprd_comp_set_rate() local
34 return sprd_div_helper_set_rate(&cc->common, &cc->div, in sprd_comp_set_rate()
40 struct sprd_comp *cc = hw_to_sprd_comp(hw); in sprd_comp_get_parent() local
42 return sprd_mux_helper_get_parent(&cc->common, &cc->mux); in sprd_comp_get_parent()
47 struct sprd_comp *cc = hw_to_sprd_comp(hw); in sprd_comp_set_parent() local
49 return sprd_mux_helper_set_parent(&cc->common, &cc->mux, index); in sprd_comp_set_parent()
/linux-5.19.10/kernel/time/
Dtimecounter.c9 const struct cyclecounter *cc, in timecounter_init() argument
12 tc->cc = cc; in timecounter_init()
13 tc->cycle_last = cc->read(cc); in timecounter_init()
15 tc->mask = (1ULL << cc->shift) - 1; in timecounter_init()
37 cycle_now = tc->cc->read(tc->cc); in timecounter_read_delta()
40 cycle_delta = (cycle_now - tc->cycle_last) & tc->cc->mask; in timecounter_read_delta()
43 ns_offset = cyclecounter_cyc2ns(tc->cc, cycle_delta, in timecounter_read_delta()
69 static u64 cc_cyc2ns_backwards(const struct cyclecounter *cc, in cc_cyc2ns_backwards() argument
74 ns = ((ns * cc->mult) - frac) >> cc->shift; in cc_cyc2ns_backwards()
82 u64 delta = (cycle_tstamp - tc->cycle_last) & tc->cc->mask; in timecounter_cyc2time()
[all …]
/linux-5.19.10/arch/x86/include/asm/
Drmwcc.h18 #define __GEN_RMWcc(fullop, _var, cc, clobbers, ...) \ argument
21 asm_volatile_goto (fullop "; j" #cc " %l[cc_label]" \
34 #define __GEN_RMWcc(fullop, _var, cc, clobbers, ...) \ argument
37 asm volatile (fullop CC_SET(cc) \
38 : [var] "+m" (_var), CC_OUT(cc) (c) \
45 #define GEN_UNARY_RMWcc_4(op, var, cc, arg0) \ argument
46 __GEN_RMWcc(op " " arg0, var, cc, __CLOBBERS_MEM())
48 #define GEN_UNARY_RMWcc_3(op, var, cc) \ argument
49 GEN_UNARY_RMWcc_4(op, var, cc, "%[var]")
53 #define GEN_BINARY_RMWcc_6(op, var, cc, vcon, _val, arg0) \ argument
[all …]
/linux-5.19.10/sound/soc/qcom/qdsp6/
Dq6dsp-lpass-clocks.c40 struct q6dsp_cc *cc = dev_get_drvdata(clk->dev); in clk_q6dsp_prepare() local
42 return cc->desc->lpass_set_clk(clk->dev, clk->q6dsp_clk_id, clk->attributes, in clk_q6dsp_prepare()
49 struct q6dsp_cc *cc = dev_get_drvdata(clk->dev); in clk_q6dsp_unprepare() local
51 cc->desc->lpass_set_clk(clk->dev, clk->q6dsp_clk_id, clk->attributes, in clk_q6dsp_unprepare()
90 struct q6dsp_cc *cc = dev_get_drvdata(clk->dev); in clk_vote_q6dsp_block() local
92 return cc->desc->lpass_vote_clk(clk->dev, clk->q6dsp_clk_id, in clk_vote_q6dsp_block()
99 struct q6dsp_cc *cc = dev_get_drvdata(clk->dev); in clk_unvote_q6dsp_block() local
101 cc->desc->lpass_unvote_clk(clk->dev, clk->q6dsp_clk_id, clk->handle); in clk_unvote_q6dsp_block()
113 struct q6dsp_cc *cc = data; in q6dsp_of_clk_hw_get() local
118 dev_err(cc->dev, "Invalid clk specifier (%d, %d)\n", idx, attr); in q6dsp_of_clk_hw_get()
[all …]
/linux-5.19.10/arch/m68k/
DMakefile19 CROSS_COMPILE := $(call cc-cross-prefix, \
41 cpuflags-$(CONFIG_M5441x) = $(call cc-option,-mcpu=54455,-mcfv4e)
42 cpuflags-$(CONFIG_M54xx) = $(call cc-option,-mcpu=5475,-m5200)
43 cpuflags-$(CONFIG_M5407) = $(call cc-option,-mcpu=5407,-m5200)
44 cpuflags-$(CONFIG_M532x) = $(call cc-option,-mcpu=532x,-m5307)
45 cpuflags-$(CONFIG_M537x) = $(call cc-option,-mcpu=537x,-m5307)
46 cpuflags-$(CONFIG_M5307) = $(call cc-option,-mcpu=5307,-m5200)
47 cpuflags-$(CONFIG_M528x) = $(call cc-option,-mcpu=528x,-m5307)
48 cpuflags-$(CONFIG_M5275) = $(call cc-option,-mcpu=5275,-m5307)
49 cpuflags-$(CONFIG_M5272) = $(call cc-option,-mcpu=5272,-m5307)
[all …]
/linux-5.19.10/crypto/
Drmd160.c51 u32 aa, bb, cc, dd, ee, aaa, bbb, ccc, ddd, eee; in rmd160_transform() local
56 cc = state[2]; in rmd160_transform()
68 ROUND(aa, bb, cc, dd, ee, F1, K1, in[0], 11); in rmd160_transform()
69 ROUND(ee, aa, bb, cc, dd, F1, K1, in[1], 14); in rmd160_transform()
70 ROUND(dd, ee, aa, bb, cc, F1, K1, in[2], 15); in rmd160_transform()
71 ROUND(cc, dd, ee, aa, bb, F1, K1, in[3], 12); in rmd160_transform()
72 ROUND(bb, cc, dd, ee, aa, F1, K1, in[4], 5); in rmd160_transform()
73 ROUND(aa, bb, cc, dd, ee, F1, K1, in[5], 8); in rmd160_transform()
74 ROUND(ee, aa, bb, cc, dd, F1, K1, in[6], 7); in rmd160_transform()
75 ROUND(dd, ee, aa, bb, cc, F1, K1, in[7], 9); in rmd160_transform()
[all …]
/linux-5.19.10/arch/s390/include/asm/
Dcpu_mf.h183 int cc; in lcctl() local
189 : "=d" (cc) : "Q" (ctl) : "cc"); in lcctl()
190 return cc; in lcctl()
197 int cc; in __ecctr() local
203 : "=d" (_content), "=d" (cc) : "d" (ctr) : "cc"); in __ecctr()
205 return cc; in __ecctr()
212 int cc; in ecctr() local
214 cc = __ecctr(ctr, &content); in ecctr()
215 if (!cc) in ecctr()
217 return cc; in ecctr()
[all …]
/linux-5.19.10/tools/arch/x86/include/asm/
Drmwcc.h7 #define __GEN_RMWcc(fullop, var, cc, ...) \ argument
9 asm_volatile_goto (fullop "; j" cc " %l[cc_label]" \
17 #define GEN_UNARY_RMWcc(op, var, arg0, cc) \ argument
18 __GEN_RMWcc(op " " arg0, var, cc)
20 #define GEN_BINARY_RMWcc(op, var, vcon, val, arg0, cc) \ argument
21 __GEN_RMWcc(op " %1, " arg0, var, cc, vcon (val))
25 #define __GEN_RMWcc(fullop, var, cc, ...) \ argument
28 asm volatile (fullop "; set" cc " %1" \
34 #define GEN_UNARY_RMWcc(op, var, arg0, cc) \ argument
35 __GEN_RMWcc(op " " arg0, var, cc)
[all …]
/linux-5.19.10/include/linux/bcma/
Dbcma_driver_chipcommon.h663 #define bcma_cc_read32(cc, offset) \ argument
664 bcma_read32((cc)->core, offset)
665 #define bcma_cc_write32(cc, offset, val) \ argument
666 bcma_write32((cc)->core, offset, val)
668 #define bcma_cc_mask32(cc, offset, mask) \ argument
669 bcma_cc_write32(cc, offset, bcma_cc_read32(cc, offset) & (mask))
670 #define bcma_cc_set32(cc, offset, set) \ argument
671 bcma_cc_write32(cc, offset, bcma_cc_read32(cc, offset) | (set))
672 #define bcma_cc_maskset32(cc, offset, mask, set) \ argument
673 bcma_cc_write32(cc, offset, (bcma_cc_read32(cc, offset) & (mask)) | (set))
[all …]
/linux-5.19.10/include/linux/ssb/
Dssb_driver_chipcommon.h599 static inline bool ssb_chipco_available(struct ssb_chipcommon *cc) in ssb_chipco_available() argument
601 return (cc->dev != NULL); in ssb_chipco_available()
605 #define chipco_read32(cc, offset) ssb_read32((cc)->dev, offset) argument
606 #define chipco_write32(cc, offset, val) ssb_write32((cc)->dev, offset, val) argument
608 #define chipco_mask32(cc, offset, mask) \ argument
609 chipco_write32(cc, offset, chipco_read32(cc, offset) & (mask))
610 #define chipco_set32(cc, offset, set) \ argument
611 chipco_write32(cc, offset, chipco_read32(cc, offset) | (set))
612 #define chipco_maskset32(cc, offset, mask, set) \ argument
613 chipco_write32(cc, offset, (chipco_read32(cc, offset) & (mask)) | (set))
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