/linux-5.19.10/drivers/clk/samsung/ |
D | clk-s3c2410.c | 84 GATE(PCLK_UART2, "uart2", "pclk", CLKCON, 12, 0, 0), 179 ALIAS(PCLK_UART2, "s3c2410-uart.2", "uart"), 182 ALIAS(PCLK_UART2, "s3c2410-uart.2", "clk_uart_baud0"), 267 ALIAS(PCLK_UART2, "s3c2440-uart.2", "uart"), 270 ALIAS(PCLK_UART2, "s3c2440-uart.2", "clk_uart_baud2"),
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D | clk-s3c2412.c | 113 GATE(PCLK_UART2, "uart2", "pclk", CLKCON, 21, 0, 0), 139 ALIAS(PCLK_UART2, "s3c2412-uart.2", "uart"), 142 ALIAS(PCLK_UART2, "s3c2412-uart.2", "clk_uart_baud2"),
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D | clk-s3c2443.c | 140 GATE(PCLK_UART2, "uart2", "pclk", PCLKCON, 2, 0, 0), 154 ALIAS(PCLK_UART2, "s3c2440-uart.2", "uart"), 158 ALIAS(PCLK_UART2, "s3c2440-uart.2", "clk_uart_baud2"),
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D | clk-s3c64xx.c | 242 GATE_BUS(PCLK_UART2, "pclk_uart2", "pclk", PCLK_GATE, 3), 347 ALIAS(PCLK_UART2, "s3c6400-uart.2", "uart"),
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/linux-5.19.10/arch/arm/boot/dts/ |
D | s3c2416.dtsi | 116 clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
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D | s3c64xx.dtsi | 147 clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
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/linux-5.19.10/include/dt-bindings/clock/ |
D | s3c2410.h | 33 #define PCLK_UART2 18 macro
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D | s3c2412.h | 48 #define PCLK_UART2 39 macro
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D | s3c2443.h | 70 #define PCLK_UART2 74 macro
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D | samsung,s3c64xx-clock.h | 86 #define PCLK_UART2 71 macro
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D | rk3036-cru.h | 70 #define PCLK_UART2 343 macro
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D | exynos7-clk.h | 94 #define PCLK_UART2 2 macro
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D | rk3188-cru-common.h | 86 #define PCLK_UART2 334 macro
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D | rk3128-cru.h | 110 #define PCLK_UART2 343 macro
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D | rk3228-cru.h | 109 #define PCLK_UART2 343 macro
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D | rv1108-cru.h | 118 #define PCLK_UART2 267 macro
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D | rk3288-cru.h | 135 #define PCLK_UART2 343 macro
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D | px30-cru.h | 153 #define PCLK_UART2 330 macro
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D | rk3308-cru.h | 178 #define PCLK_UART2 199 macro
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D | rk3328-cru.h | 143 #define PCLK_UART2 212 macro
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D | rk3368-cru.h | 127 #define PCLK_UART2 343 macro
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D | rk3399-cru.h | 249 #define PCLK_UART2 354 macro
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D | rk3568-cru.h | 351 #define PCLK_UART2 288 macro
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/linux-5.19.10/Documentation/devicetree/bindings/clock/ |
D | rockchip,rk3128-cru.txt | 56 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
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/linux-5.19.10/drivers/clk/rockchip/ |
D | clk-rk3036.c | 419 GATE(PCLK_UART2, "pclk_uart2", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 2, GFLAGS),
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