Home
last modified time | relevance | path

Searched refs:DCLK (Results 1 – 17 of 17) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/inc/
Dpower_state.h144 uint32_t DCLK; member
/linux-5.19.10/drivers/gpu/drm/i915/gt/
Dintel_llc.c62 intel_uncore_read(llc_to_gt(llc)->uncore, DCLK) & 0xf; in get_ia_constants()
/linux-5.19.10/drivers/gpu/drm/i915/
Dintel_mchbar_regs.h213 #define DCLK _MMIO(MCHBAR_MIRROR_BASE_SNB + 0x5e04) macro
/linux-5.19.10/Documentation/devicetree/bindings/clock/
Dst,nomadik.txt99 58: 3DCLK
/linux-5.19.10/arch/arm/boot/dts/
Dimx6dl-eckelmann-ci4x10.dts220 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0001b010 /* DCLK */
/linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dprocesspptables.c759 ps->uvd_clocks.DCLK = le32_to_cpu(pnon_clock_info->ulDCLK); in init_non_clock_fields()
762 ps->uvd_clocks.DCLK = 0; in init_non_clock_fields()
Dsmu10_hwmgr.c924 smu10_ps->uvd_clocks.dclk = ps->uvd_clocks.DCLK; in smu10_dpm_get_pp_table_entry()
Dsmu7_hwmgr.c3593 power_state->uvd_clocks.DCLK = 0; in smu7_get_pp_table_entry_callback_func_v1()
3686 ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in smu7_get_pp_table_entry_v1()
3834 ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in smu7_get_pp_table_entry_v0()
Dsmu8_hwmgr.c1416 smu8_ps->uvd_clocks.dclk = ps->uvd_clocks.DCLK; in smu8_dpm_get_pp_table_entry()
Dvega10_hwmgr.c3144 power_state->uvd_clocks.DCLK = 0; in vega10_get_pp_table_entry_callback_func()
3224 vega10_ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in vega10_get_pp_table_entry()
/linux-5.19.10/drivers/gpu/drm/amd/pm/swsmu/smu12/
Drenoir_ppt.c113 CLK_MAP(DCLK, CLOCK_DCLK),
/linux-5.19.10/drivers/gpu/drm/amd/pm/swsmu/smu13/
Dsmu_v13_0_7_ppt.c129 CLK_MAP(DCLK, PPCLK_DCLK_0),
Dsmu_v13_0_0_ppt.c131 CLK_MAP(DCLK, PPCLK_DCLK_0),
Daldebaran_ppt.c159 CLK_MAP(DCLK, PPCLK_DCLK),
/linux-5.19.10/drivers/gpu/drm/amd/pm/swsmu/smu11/
Darcturus_ppt.c171 CLK_MAP(DCLK, PPCLK_DCLK),
Dnavi10_ppt.c156 CLK_MAP(DCLK, PPCLK_DCLK),
Dsienna_cichlid_ppt.c166 CLK_MAP(DCLK, PPCLK_DCLK_0),