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Searched refs:base_addr (Results 1 – 25 of 467) sorted by relevance

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/linux-5.19.10/include/trace/events/
Dpercpu.h15 size_t align, void *base_addr, int off,
18 TP_ARGS(call_site, reserved, is_atomic, size, align, base_addr, off,
27 __field( void *, base_addr )
39 __entry->base_addr = base_addr;
50 __entry->base_addr, __entry->off, __entry->ptr,
56 TP_PROTO(void *base_addr, int off, void __percpu *ptr),
58 TP_ARGS(base_addr, off, ptr),
61 __field( void *, base_addr )
67 __entry->base_addr = base_addr;
73 __entry->base_addr, __entry->off, __entry->ptr)
[all …]
/linux-5.19.10/drivers/irqchip/
Dirq-ftintc010.c26 #define FT010_IRQ_SOURCE(base_addr) (base_addr + 0x00) argument
27 #define FT010_IRQ_MASK(base_addr) (base_addr + 0x04) argument
28 #define FT010_IRQ_CLEAR(base_addr) (base_addr + 0x08) argument
30 #define FT010_IRQ_MODE(base_addr) (base_addr + 0x0C) argument
32 #define FT010_IRQ_POLARITY(base_addr) (base_addr + 0x10) argument
33 #define FT010_IRQ_STATUS(base_addr) (base_addr + 0x14) argument
34 #define FT010_FIQ_SOURCE(base_addr) (base_addr + 0x20) argument
35 #define FT010_FIQ_MASK(base_addr) (base_addr + 0x24) argument
36 #define FT010_FIQ_CLEAR(base_addr) (base_addr + 0x28) argument
37 #define FT010_FIQ_MODE(base_addr) (base_addr + 0x2C) argument
[all …]
/linux-5.19.10/drivers/char/ipmi/
Dipmi_dmi.c35 static void __init dmi_add_platform_ipmi(unsigned long base_addr, in dmi_add_platform_ipmi() argument
70 p.addr = base_addr; in dmi_add_platform_ipmi()
83 info->addr = base_addr; in dmi_add_platform_ipmi()
101 unsigned long base_addr) in ipmi_dmi_get_slave_addr() argument
108 info->addr == base_addr) in ipmi_dmi_get_slave_addr()
130 unsigned long base_addr; in dmi_decode_ipmi() local
142 memcpy(&base_addr, data + DMI_IPMI_ADDR, sizeof(unsigned long)); in dmi_decode_ipmi()
143 if (!base_addr) { in dmi_decode_ipmi()
150 base_addr = data[DMI_IPMI_ADDR] >> 1; in dmi_decode_ipmi()
151 if (base_addr == 0) { in dmi_decode_ipmi()
[all …]
/linux-5.19.10/drivers/parisc/
Ddino.c177 void __iomem *base_addr = d->hba.base_addr; in dino_cfg_read() local
180 DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devfn, where, in dino_cfg_read()
185 __raw_writel(v, base_addr + DINO_PCI_ADDR); in dino_cfg_read()
189 *val = readb(base_addr + DINO_CONFIG_DATA + (where & 3)); in dino_cfg_read()
191 *val = readw(base_addr + DINO_CONFIG_DATA + (where & 2)); in dino_cfg_read()
193 *val = readl(base_addr + DINO_CONFIG_DATA); in dino_cfg_read()
212 void __iomem *base_addr = d->hba.base_addr; in dino_cfg_write() local
215 DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devfn, where, in dino_cfg_write()
220 __raw_writel(v & 0xffffff00, base_addr + DINO_PCI_ADDR); in dino_cfg_write()
221 __raw_readl(base_addr + DINO_CONFIG_DATA); in dino_cfg_write()
[all …]
Dlba_pci.c207 error_config = READ_REG32(d->hba.base_addr + LBA_ERROR_CONFIG); \
210 status_control = READ_REG32(d->hba.base_addr + LBA_STAT_CTL); \
216 arb_mask = READ_REG32(d->hba.base_addr + LBA_ARB_MASK); \
222 WRITE_REG32(0x1, d->hba.base_addr + LBA_ARB_MASK); \
228 WRITE_REG32(error_config | LBA_SMART_MODE, d->hba.base_addr + LBA_ERROR_CONFIG); \
237 WRITE_REG32(tok | PCI_VENDOR_ID, (d)->hba.base_addr + LBA_PCI_CFG_ADDR);\
242 lba_t32 = READ_REG32((d)->hba.base_addr + LBA_PCI_CFG_ADDR); \
247 WRITE_REG32(~0, (d)->hba.base_addr + LBA_PCI_CFG_DATA); \
252 lba_t32 = READ_REG32((d)->hba.base_addr + LBA_PCI_CFG_ADDR); \
307 WRITE_REG32(((addr) & ~3), (d)->hba.base_addr + LBA_PCI_CFG_ADDR);
[all …]
/linux-5.19.10/drivers/fpga/
Daltera-freeze-bridge.c33 void __iomem *base_addr; member
44 void __iomem *csr_illegal_req_addr = priv->base_addr + in altera_freeze_br_req_ack()
65 status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET); in altera_freeze_br_req_ack()
69 ctrl = readl(priv->base_addr + FREEZE_CSR_CTRL_OFFSET); in altera_freeze_br_req_ack()
90 void __iomem *csr_ctrl_addr = priv->base_addr + in altera_freeze_br_do_freeze()
95 status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET); in altera_freeze_br_do_freeze()
125 void __iomem *csr_ctrl_addr = priv->base_addr + in altera_freeze_br_do_unfreeze()
132 status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET); in altera_freeze_br_do_unfreeze()
150 status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET); in altera_freeze_br_do_unfreeze()
213 void __iomem *base_addr; in altera_freeze_br_probe() local
[all …]
/linux-5.19.10/drivers/gpio/
Dgpio-zynq.c128 void __iomem *base_addr; member
236 data = readl_relaxed(gpio->base_addr + in zynq_gpio_get_value()
239 data = readl_relaxed(gpio->base_addr + in zynq_gpio_get_value()
244 data = readl_relaxed(gpio->base_addr + in zynq_gpio_get_value()
247 data = readl_relaxed(gpio->base_addr + in zynq_gpio_get_value()
252 data = readl_relaxed(gpio->base_addr + in zynq_gpio_get_value()
292 writel_relaxed(state, gpio->base_addr + reg_offset); in zynq_gpio_set_value()
324 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_dir_in()
326 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_dir_in()
356 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_dir_out()
[all …]
Dgpio-ts4800.c26 void __iomem *base_addr; in ts4800_gpio_probe() local
34 base_addr = devm_platform_ioremap_resource(pdev, 0); in ts4800_gpio_probe()
35 if (IS_ERR(base_addr)) in ts4800_gpio_probe()
36 return PTR_ERR(base_addr); in ts4800_gpio_probe()
48 retval = bgpio_init(chip, &pdev->dev, 2, base_addr + INPUT_REG_OFFSET, in ts4800_gpio_probe()
49 base_addr + OUTPUT_REG_OFFSET, NULL, in ts4800_gpio_probe()
50 base_addr + DIRECTION_REG_OFFSET, NULL, 0); in ts4800_gpio_probe()
/linux-5.19.10/tools/testing/selftests/vm/
Dmap_fixed_noreplace.c49 unsigned long base_addr; in main() local
57 base_addr = find_base_addr(size); in main()
58 if (!base_addr) { in main()
67 addr = base_addr; in main()
88 addr = base_addr + page_size; in main()
108 addr = base_addr; in main()
129 addr = base_addr + (2 * page_size); in main()
149 addr = base_addr + (3 * page_size); in main()
169 addr = base_addr; in main()
189 addr = base_addr; in main()
[all …]
/linux-5.19.10/drivers/staging/axis-fifo/
Daxis-fifo.c126 void __iomem *base_addr; /* kernel space memory */ member
160 iowrite32(tmp, fifo->base_addr + addr_offset); in sysfs_write()
173 read_val = ioread32(fifo->base_addr + addr_offset); in sysfs_read()
330 iowrite32(XLLF_SRR_RESET_MASK, fifo->base_addr + XLLF_SRR_OFFSET); in reset_ip_core()
331 iowrite32(XLLF_TDFR_RESET_MASK, fifo->base_addr + XLLF_TDFR_OFFSET); in reset_ip_core()
332 iowrite32(XLLF_RDFR_RESET_MASK, fifo->base_addr + XLLF_RDFR_OFFSET); in reset_ip_core()
336 fifo->base_addr + XLLF_IER_OFFSET); in reset_ip_core()
337 iowrite32(XLLF_INT_ALL_MASK, fifo->base_addr + XLLF_ISR_OFFSET); in reset_ip_core()
375 if (!ioread32(fifo->base_addr + XLLF_RDFO_OFFSET)) { in axis_fifo_read()
386 ioread32(fifo->base_addr + XLLF_RDFO_OFFSET), in axis_fifo_read()
[all …]
/linux-5.19.10/drivers/net/ethernet/ti/
Dtlan.c337 outl(TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD); in tlan_stop()
504 dev->base_addr = pci_io_base; in tlan_probe1()
521 dev->base_addr = ioaddr; in tlan_probe1()
579 (int)dev->base_addr, in tlan_probe1()
614 release_region(dev->base_addr, 0x10); in tlan_eisa_cleanup()
897 priv->tlan_rev = tlan_dio_read8(dev->base_addr, TLAN_DEF_REVISION); in tlan_open()
1086 outl(tail_list_phys, dev->base_addr + TLAN_CH_PARM); in tlan_start_tx()
1087 outl(TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD); in tlan_start_tx()
1140 host_int = inw(dev->base_addr + TLAN_HOST_INT); in tlan_handle_interrupt()
1146 outw(host_int, dev->base_addr + TLAN_HOST_INT); in tlan_handle_interrupt()
[all …]
Dtlan.h444 static inline u8 tlan_dio_read8(u16 base_addr, u16 internal_addr) in tlan_dio_read8() argument
446 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_read8()
447 return inb((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x3)); in tlan_dio_read8()
454 static inline u16 tlan_dio_read16(u16 base_addr, u16 internal_addr) in tlan_dio_read16() argument
456 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_read16()
457 return inw((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x2)); in tlan_dio_read16()
464 static inline u32 tlan_dio_read32(u16 base_addr, u16 internal_addr) in tlan_dio_read32() argument
466 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_read32()
467 return inl(base_addr + TLAN_DIO_DATA); in tlan_dio_read32()
474 static inline void tlan_dio_write8(u16 base_addr, u16 internal_addr, u8 data) in tlan_dio_write8() argument
[all …]
/linux-5.19.10/drivers/net/hamradio/
Dbaycom_ser_fdx.c173 outb(0x81, LCR(dev->base_addr)); /* DLAB = 1 */ in ser12_set_divisor()
174 outb(divisor, DLL(dev->base_addr)); in ser12_set_divisor()
175 outb(divisor >> 8, DLM(dev->base_addr)); in ser12_set_divisor()
176 outb(0x01, LCR(dev->base_addr)); /* word length = 6 */ in ser12_set_divisor()
182 outb(0x00, THR(dev->base_addr)); in ser12_set_divisor()
258 if ((iir = inb(IIR(dev->base_addr))) & 1) in ser12_interrupt()
262 msr = inb(MSR(dev->base_addr)); in ser12_interrupt()
269 inb(LSR(dev->base_addr)); in ser12_interrupt()
273 inb(RBR(dev->base_addr)); in ser12_interrupt()
282 outb(0x00, THR(dev->base_addr)); in ser12_interrupt()
[all …]
Dbaycom_ser_hdx.c158 outb(0x81, LCR(dev->base_addr)); /* DLAB = 1 */ in ser12_set_divisor()
159 outb(divisor, DLL(dev->base_addr)); in ser12_set_divisor()
160 outb(0, DLM(dev->base_addr)); in ser12_set_divisor()
161 outb(0x01, LCR(dev->base_addr)); /* word length = 6 */ in ser12_set_divisor()
167 outb(0x00, THR(dev->base_addr)); in ser12_set_divisor()
193 outb(0x0e | (!!bc->modem.ser12.tx_bit), MCR(dev->base_addr)); in ser12_tx()
209 cur_s = inb(MSR(dev->base_addr)) & 0x10; /* the CTS line */ in ser12_rx()
339 outb(0x0d, MCR(dev->base_addr)); /* transmitter off */ in ser12_rx()
346 hdlcdrv_setdcd(&bc->hdrv, !((inb(MSR(dev->base_addr)) ^ bc->opt_dcd) & 0x80)); in ser12_rx()
371 if ((iir = inb(IIR(dev->base_addr))) & 1) in ser12_interrupt()
[all …]
/linux-5.19.10/drivers/clk/mediatek/
Dclk-apmixed.c22 void __iomem *base_addr; member
34 return (readl(tx->base_addr) & REF2USB_EN_MASK) == REF2USB_EN_MASK; in mtk_ref2usb_tx_is_prepared()
42 val = readl(tx->base_addr); in mtk_ref2usb_tx_prepare()
45 writel(val, tx->base_addr); in mtk_ref2usb_tx_prepare()
49 writel(val, tx->base_addr); in mtk_ref2usb_tx_prepare()
52 writel(val, tx->base_addr); in mtk_ref2usb_tx_prepare()
62 val = readl(tx->base_addr); in mtk_ref2usb_tx_unprepare()
64 writel(val, tx->base_addr); in mtk_ref2usb_tx_unprepare()
84 tx->base_addr = reg; in mtk_clk_register_ref2usb_tx()
/linux-5.19.10/drivers/net/ethernet/xilinx/
Dxilinx_emaclite.c126 void __iomem *base_addr; member
155 reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET); in xemaclite_enable_interrupts()
157 drvdata->base_addr + XEL_TSR_OFFSET); in xemaclite_enable_interrupts()
160 xemaclite_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET); in xemaclite_enable_interrupts()
163 xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET); in xemaclite_enable_interrupts()
178 xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET); in xemaclite_disable_interrupts()
181 reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET); in xemaclite_disable_interrupts()
183 drvdata->base_addr + XEL_TSR_OFFSET); in xemaclite_disable_interrupts()
186 reg_data = xemaclite_readl(drvdata->base_addr + XEL_RSR_OFFSET); in xemaclite_disable_interrupts()
188 drvdata->base_addr + XEL_RSR_OFFSET); in xemaclite_disable_interrupts()
[all …]
/linux-5.19.10/drivers/clocksource/
Dtimer-cadence-ttc.c74 void __iomem *base_addr; member
115 ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_set_interval()
117 writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_set_interval()
119 writel_relaxed(cycles, timer->base_addr + TTC_INTR_VAL_OFFSET); in ttc_set_interval()
127 writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_set_interval()
144 readl_relaxed(timer->base_addr + TTC_ISR_OFFSET); in ttc_clock_event_interrupt()
160 return (u64)readl_relaxed(timer->base_addr + in __ttc_clocksource_read()
198 ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_shutdown()
200 writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_shutdown()
220 ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_resume()
[all …]
/linux-5.19.10/drivers/net/ethernet/8390/
Dsmc-ultra.c143 int base_addr = dev->base_addr; in do_ultra_probe() local
146 if (base_addr > 0x1ff) /* Check a single specified location. */ in do_ultra_probe()
147 return ultra_probe1(dev, base_addr); in do_ultra_probe()
148 else if (base_addr != 0) /* Don't probe at all. */ in do_ultra_probe()
280 dev->base_addr = ioaddr+ULTRA_NIC_OFFSET; in ultra_probe1()
362 dev->base_addr = pnp_port_start(idev, 0); in ultra_probe_isapnp()
367 dev->base_addr, dev->irq); in ultra_probe_isapnp()
368 if (ultra_probe1(dev, dev->base_addr) != 0) { /* Shouldn't happen. */ in ultra_probe_isapnp()
371 dev->base_addr); in ultra_probe_isapnp()
391 int ioaddr = dev->base_addr - ULTRA_NIC_OFFSET; /* ASIC addr */ in ultra_open()
[all …]
/linux-5.19.10/drivers/net/wwan/t7xx/
Dt7xx_mhccif.c34 void __iomem *mhccif_pbase = t7xx_dev->base_addr.mhccif_rc_base; in t7xx_mhccif_clear_interrupts()
82 return ioread32(t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_STS); in t7xx_mhccif_read_sw_int_sts()
87 iowrite32(val, t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_EAP_MASK_SET); in t7xx_mhccif_mask_set()
92 iowrite32(val, t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_EAP_MASK_CLR); in t7xx_mhccif_mask_clr()
97 return ioread32(t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_EAP_MASK); in t7xx_mhccif_mask_get()
107 t7xx_dev->base_addr.mhccif_rc_base = t7xx_dev->base_addr.pcie_ext_reg_base + in t7xx_mhccif_init()
109 t7xx_dev->base_addr.pcie_dev_reg_trsl_addr; in t7xx_mhccif_init()
118 void __iomem *mhccif_pbase = t7xx_dev->base_addr.mhccif_rc_base; in t7xx_mhccif_h2d_swint_trigger()
/linux-5.19.10/arch/sparc/mm/
Dinit_32.c65 unsigned long start_pfn = sp_banks[i].base_addr >> PAGE_SHIFT; in calc_highpages()
66 unsigned long end_pfn = (sp_banks[i].base_addr + sp_banks[i].num_bytes) >> PAGE_SHIFT; in calc_highpages()
86 last_pfn = (sp_banks[0].base_addr + sp_banks[0].num_bytes) >> PAGE_SHIFT; in calc_max_low_pfn()
88 curr_pfn = sp_banks[i].base_addr >> PAGE_SHIFT; in calc_max_low_pfn()
96 last_pfn = (sp_banks[i].base_addr + sp_banks[i].num_bytes) >> PAGE_SHIFT; in calc_max_low_pfn()
144 end_of_phys_memory = sp_banks[i].base_addr + in bootmem_init()
156 sp_banks[i].base_addr = 0xdeadbeef; in bootmem_init()
158 memblock_add(sp_banks[i].base_addr, in bootmem_init()
161 sp_banks[i+1].base_addr = 0xdeadbeef; in bootmem_init()
166 memblock_add(sp_banks[i].base_addr, sp_banks[i].num_bytes); in bootmem_init()
[all …]
/linux-5.19.10/drivers/net/arcnet/
Dcom90io.c73 int ioaddr = dev->base_addr; in get_buffer_byte()
85 int ioaddr = dev->base_addr; in put_buffer_byte()
98 int ioaddr = dev->base_addr; in get_whole_buffer()
114 int ioaddr = dev->base_addr; in put_whole_buffer()
132 int ioaddr = dev->base_addr, status; in com90io_probe()
224 int ioaddr = dev->base_addr; in com90io_found()
234 if (!request_region(dev->base_addr, ARCNET_TOTAL_SIZE, in com90io_found()
262 release_region(dev->base_addr, ARCNET_TOTAL_SIZE); in com90io_found()
267 dev->dev_addr[0], dev->base_addr, dev->irq); in com90io_found()
282 short ioaddr = dev->base_addr; in com90io_reset()
[all …]
/linux-5.19.10/arch/sparc/prom/
Dmemory.c24 sp_banks[index].base_addr = (unsigned long) p->start_adr; in prom_meminit_v0()
43 sp_banks[i].base_addr = reg[i].phys_addr; in prom_meminit_v2()
54 if (x->base_addr > y->base_addr) in sp_banks_cmp()
56 if (x->base_addr < y->base_addr) in sp_banks_cmp()
83 sp_banks[num_ents].base_addr = 0xdeadbeef; in prom_meminit()
/linux-5.19.10/arch/powerpc/include/asm/
Ddcr-native.h78 static inline unsigned __mfdcri(int base_addr, int base_data, int reg) in __mfdcri() argument
85 mtdcrx(base_addr, reg); in __mfdcri()
88 __mtdcr(base_addr, reg); in __mfdcri()
95 static inline void __mtdcri(int base_addr, int base_data, int reg, in __mtdcri() argument
102 mtdcrx(base_addr, reg); in __mtdcri()
105 __mtdcr(base_addr, reg); in __mtdcri()
111 static inline void __dcri_clrset(int base_addr, int base_data, int reg, in __dcri_clrset() argument
119 mtdcrx(base_addr, reg); in __dcri_clrset()
123 __mtdcr(base_addr, reg); in __dcri_clrset()
/linux-5.19.10/drivers/net/ethernet/natsemi/
Dxtsonic.c71 (0xffff & *((volatile unsigned int *)dev->base_addr+reg))
74 *((volatile unsigned int *)dev->base_addr+reg) = val
127 unsigned int base_addr = dev->base_addr; in sonic_probe1() local
132 if (!request_mem_region(base_addr, 0x100, xtsonic_string)) in sonic_probe1()
190 release_region(dev->base_addr, SONIC_MEM_SIZE); in sonic_probe1()
221 dev->base_addr = resmem->start; in xtsonic_probe()
228 dev->base_addr, dev->dev_addr, dev->irq); in xtsonic_probe()
241 release_region(dev->base_addr, SONIC_MEM_SIZE); in xtsonic_probe()
261 release_region (dev->base_addr, SONIC_MEM_SIZE); in xtsonic_device_remove()
/linux-5.19.10/arch/alpha/kernel/
Dsmc37c669.c1235 SMC37c669_SERIAL_BASE_ADDRESS_REGISTER base_addr; in SMC37c669_enable_device() local
1252 base_addr.as_uchar = 0; in SMC37c669_enable_device()
1253 base_addr.by_field.addr9_3 = local_config[ func ].port1 >> 3; in SMC37c669_enable_device()
1257 base_addr.as_uchar in SMC37c669_enable_device()
1264 SMC37c669_SERIAL_BASE_ADDRESS_REGISTER base_addr; in SMC37c669_enable_device() local
1281 base_addr.as_uchar = 0; in SMC37c669_enable_device()
1282 base_addr.by_field.addr9_3 = local_config[ func ].port1 >> 3; in SMC37c669_enable_device()
1286 base_addr.as_uchar in SMC37c669_enable_device()
1293 SMC37c669_PARALLEL_BASE_ADDRESS_REGISTER base_addr; in SMC37c669_enable_device() local
1329 base_addr.as_uchar = 0; in SMC37c669_enable_device()
[all …]

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