Lines Matching refs:base_addr

337 	outl(TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD);  in tlan_stop()
504 dev->base_addr = pci_io_base; in tlan_probe1()
521 dev->base_addr = ioaddr; in tlan_probe1()
579 (int)dev->base_addr, in tlan_probe1()
614 release_region(dev->base_addr, 0x10); in tlan_eisa_cleanup()
897 priv->tlan_rev = tlan_dio_read8(dev->base_addr, TLAN_DEF_REVISION); in tlan_open()
1086 outl(tail_list_phys, dev->base_addr + TLAN_CH_PARM); in tlan_start_tx()
1087 outl(TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD); in tlan_start_tx()
1140 host_int = inw(dev->base_addr + TLAN_HOST_INT); in tlan_handle_interrupt()
1146 outw(host_int, dev->base_addr + TLAN_HOST_INT); in tlan_handle_interrupt()
1151 outl(host_cmd, dev->base_addr + TLAN_HOST_CMD); in tlan_handle_interrupt()
1221 tlan_print_dio(dev->base_addr); in tlan_get_stats()
1268 tmp = tlan_dio_read8(dev->base_addr, TLAN_NET_CMD); in tlan_set_multicast_list()
1269 tlan_dio_write8(dev->base_addr, in tlan_set_multicast_list()
1272 tmp = tlan_dio_read8(dev->base_addr, TLAN_NET_CMD); in tlan_set_multicast_list()
1273 tlan_dio_write8(dev->base_addr, in tlan_set_multicast_list()
1278 tlan_dio_write32(dev->base_addr, TLAN_HASH_1, in tlan_set_multicast_list()
1280 tlan_dio_write32(dev->base_addr, TLAN_HASH_2, in tlan_set_multicast_list()
1300 tlan_dio_write32(dev->base_addr, TLAN_HASH_1, hash1); in tlan_set_multicast_list()
1301 tlan_dio_write32(dev->base_addr, TLAN_HASH_2, hash2); in tlan_set_multicast_list()
1397 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM); in tlan_handle_tx_eof()
1405 tlan_dio_write8(dev->base_addr, in tlan_handle_tx_eof()
1550 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM); in tlan_handle_rx_eof()
1556 tlan_dio_write8(dev->base_addr, in tlan_handle_rx_eof()
1640 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM); in tlan_handle_tx_eoc()
1687 error = inl(dev->base_addr + TLAN_CH_PARM); in tlan_handle_status_check()
1690 outl(TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD); in tlan_handle_status_check()
1700 net_sts = tlan_dio_read8(dev->base_addr, TLAN_NET_STS); in tlan_handle_status_check()
1702 tlan_dio_write8(dev->base_addr, TLAN_NET_STS, net_sts); in tlan_handle_status_check()
1765 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM); in tlan_handle_rx_eoc()
1849 tlan_dio_write8(dev->base_addr, in tlan_timer()
2076 outw(TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR); in tlan_read_and_clear_stats()
2077 tx_good = inb(dev->base_addr + TLAN_DIO_DATA); in tlan_read_and_clear_stats()
2078 tx_good += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8; in tlan_read_and_clear_stats()
2079 tx_good += inb(dev->base_addr + TLAN_DIO_DATA + 2) << 16; in tlan_read_and_clear_stats()
2080 tx_under = inb(dev->base_addr + TLAN_DIO_DATA + 3); in tlan_read_and_clear_stats()
2082 outw(TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR); in tlan_read_and_clear_stats()
2083 rx_good = inb(dev->base_addr + TLAN_DIO_DATA); in tlan_read_and_clear_stats()
2084 rx_good += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8; in tlan_read_and_clear_stats()
2085 rx_good += inb(dev->base_addr + TLAN_DIO_DATA + 2) << 16; in tlan_read_and_clear_stats()
2086 rx_over = inb(dev->base_addr + TLAN_DIO_DATA + 3); in tlan_read_and_clear_stats()
2088 outw(TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR); in tlan_read_and_clear_stats()
2089 def_tx = inb(dev->base_addr + TLAN_DIO_DATA); in tlan_read_and_clear_stats()
2090 def_tx += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8; in tlan_read_and_clear_stats()
2091 crc = inb(dev->base_addr + TLAN_DIO_DATA + 2); in tlan_read_and_clear_stats()
2092 code = inb(dev->base_addr + TLAN_DIO_DATA + 3); in tlan_read_and_clear_stats()
2094 outw(TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR); in tlan_read_and_clear_stats()
2095 multi_col = inb(dev->base_addr + TLAN_DIO_DATA); in tlan_read_and_clear_stats()
2096 multi_col += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8; in tlan_read_and_clear_stats()
2097 single_col = inb(dev->base_addr + TLAN_DIO_DATA + 2); in tlan_read_and_clear_stats()
2098 single_col += inb(dev->base_addr + TLAN_DIO_DATA + 3) << 8; in tlan_read_and_clear_stats()
2100 outw(TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR); in tlan_read_and_clear_stats()
2101 excess_col = inb(dev->base_addr + TLAN_DIO_DATA); in tlan_read_and_clear_stats()
2102 late_col = inb(dev->base_addr + TLAN_DIO_DATA + 1); in tlan_read_and_clear_stats()
2103 loss = inb(dev->base_addr + TLAN_DIO_DATA + 2); in tlan_read_and_clear_stats()
2158 data = inl(dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2160 outl(data, dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2166 data = inl(dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2168 outl(data, dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2173 tlan_dio_write32(dev->base_addr, (u16) i, 0); in tlan_reset_adapter()
2178 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, (u16) data); in tlan_reset_adapter()
2182 outl(TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2183 outl(TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2187 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR); in tlan_reset_adapter()
2188 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO; in tlan_reset_adapter()
2195 tlan_dio_write8(dev->base_addr, TLAN_INT_DIS, data8); in tlan_reset_adapter()
2203 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x0a); in tlan_reset_adapter()
2205 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x00); in tlan_reset_adapter()
2208 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x08); in tlan_reset_adapter()
2216 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, (u16) data); in tlan_reset_adapter()
2247 tlan_dio_write8(dev->base_addr, TLAN_NET_CMD, data); in tlan_finish_reset()
2251 tlan_dio_write8(dev->base_addr, TLAN_NET_MASK, data); in tlan_finish_reset()
2252 tlan_dio_write16(dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7); in tlan_finish_reset()
2302 sio = tlan_dio_read8(dev->base_addr, TLAN_NET_SIO); in tlan_finish_reset()
2304 tlan_dio_write8(dev->base_addr, TLAN_NET_SIO, sio); in tlan_finish_reset()
2310 outb((TLAN_HC_INT_ON >> 8), dev->base_addr + TLAN_HOST_CMD + 1); in tlan_finish_reset()
2313 dev->base_addr + TLAN_HOST_CMD + 1); in tlan_finish_reset()
2314 outl(priv->rx_list_dma, dev->base_addr + TLAN_CH_PARM); in tlan_finish_reset()
2315 outl(TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD); in tlan_finish_reset()
2316 tlan_dio_write8(dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK); in tlan_finish_reset()
2359 tlan_dio_write8(dev->base_addr, in tlan_set_mac()
2363 tlan_dio_write8(dev->base_addr, in tlan_set_mac()
2507 tlan_mii_sync(dev->base_addr); in tlan_phy_power_down()
2513 tlan_mii_sync(dev->base_addr); in tlan_phy_power_down()
2534 tlan_mii_sync(dev->base_addr); in tlan_phy_power_up()
2537 tlan_mii_sync(dev->base_addr); in tlan_phy_power_up()
2559 tlan_mii_sync(dev->base_addr); in tlan_phy_reset()
2638 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, data); in tlan_phy_start_link()
2764 tlan_dio_write8(dev->base_addr, TLAN_LED_REG, 0); in tlan_phy_monitor()
2771 tlan_mii_sync(dev->base_addr); in tlan_phy_monitor()
2786 tlan_dio_write8(dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK); in tlan_phy_monitor()
2845 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR); in __tlan_mii_read_reg()
2846 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO; in __tlan_mii_read_reg()
2848 tlan_mii_sync(dev->base_addr); in __tlan_mii_read_reg()
2854 tlan_mii_send_data(dev->base_addr, 0x1, 2); /* start (01b) */ in __tlan_mii_read_reg()
2855 tlan_mii_send_data(dev->base_addr, 0x2, 2); /* read (10b) */ in __tlan_mii_read_reg()
2856 tlan_mii_send_data(dev->base_addr, phy, 5); /* device # */ in __tlan_mii_read_reg()
2857 tlan_mii_send_data(dev->base_addr, reg, 5); /* register # */ in __tlan_mii_read_reg()
3015 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR); in __tlan_mii_write_reg()
3016 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO; in __tlan_mii_write_reg()
3018 tlan_mii_sync(dev->base_addr); in __tlan_mii_write_reg()
3024 tlan_mii_send_data(dev->base_addr, 0x1, 2); /* start (01b) */ in __tlan_mii_write_reg()
3025 tlan_mii_send_data(dev->base_addr, 0x1, 2); /* write (01b) */ in __tlan_mii_write_reg()
3026 tlan_mii_send_data(dev->base_addr, phy, 5); /* device # */ in __tlan_mii_write_reg()
3027 tlan_mii_send_data(dev->base_addr, reg, 5); /* register # */ in __tlan_mii_write_reg()
3029 tlan_mii_send_data(dev->base_addr, 0x2, 2); /* send ACK */ in __tlan_mii_write_reg()
3030 tlan_mii_send_data(dev->base_addr, val, 16); /* send data */ in __tlan_mii_write_reg()
3251 tlan_ee_send_start(dev->base_addr); in tlan_ee_read_byte()
3252 err = tlan_ee_send_byte(dev->base_addr, 0xa0, TLAN_EEPROM_ACK); in tlan_ee_read_byte()
3257 err = tlan_ee_send_byte(dev->base_addr, ee_addr, TLAN_EEPROM_ACK); in tlan_ee_read_byte()
3262 tlan_ee_send_start(dev->base_addr); in tlan_ee_read_byte()
3263 err = tlan_ee_send_byte(dev->base_addr, 0xa1, TLAN_EEPROM_ACK); in tlan_ee_read_byte()
3268 tlan_ee_receive_byte(dev->base_addr, data, TLAN_EEPROM_STOP); in tlan_ee_read_byte()