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Searched refs:cpcon (Results 1 – 3 of 3) sorted by relevance

/linux-3.4.99/arch/arm/mach-tegra/
Dclock.h68 u8 cpcon; member
Dtegra30_clocks.c1051 cfg.cpcon = OUT_OF_TABLE_CPCON; in tegra30_pll_clk_set_rate()
1084 val |= sel->cpcon << PLL_MISC_CPCON_SHIFT; in tegra30_pll_clk_set_rate()
1231 val |= PLLE_BASE_DIV(sel->m, sel->n, sel->p, sel->cpcon); in tegra30_plle_configure()
Dtegra2_clocks.c699 val |= sel->cpcon << PLL_MISC_CPCON_SHIFT; in tegra2_pll_clk_set_rate()