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/linux-3.4.99/drivers/acpi/acpica/
Dexprep.c100 u32 accesses; in acpi_ex_generate_access() local
148 accesses = field_end_offset - field_start_offset; in acpi_ex_generate_access()
157 accesses)); in acpi_ex_generate_access()
161 if (accesses <= 1) { in acpi_ex_generate_access()
172 if (accesses < minimum_accesses) { in acpi_ex_generate_access()
173 minimum_accesses = accesses; in acpi_ex_generate_access()
/linux-3.4.99/Documentation/
Dunaligned-memory-access.txt6 unaligned accesses, why you need to write code that doesn't cause them,
13 Unaligned memory accesses occur when you try to read N bytes of data starting
50 - Some architectures are able to perform unaligned memory accesses
52 - Some architectures raise processor exceptions when unaligned accesses
55 - Some architectures raise processor exceptions when unaligned accesses
63 memory accesses to happen, your code will not work correctly on certain
94 to pad structures so that accesses to fields are suitably aligned (assuming
127 lead to unaligned accesses when accessing fields that do not satisfy
164 Here is another example of some code that could cause unaligned accesses:
172 This code will cause unaligned accesses every time the data parameter points
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Dvolatile-considered-harmful.txt36 meaning that data accesses will not be optimized across them. So the
40 accesses to that data.
50 registers. Within the kernel, register accesses, too, should be protected
52 accesses within a critical section. But, within the kernel, I/O memory
53 accesses are always done through accessor functions; accessing I/O memory
Dmemory-barriers.txt41 - Locks vs memory accesses.
42 - Locks vs I/O accesses.
121 The set of accesses as seen by the memory system in the middle can be arranged
194 (*) On any given CPU, dependent memory accesses will be issued in order, with
241 (*) It _must_ be assumed that overlapping memory accesses may be merged or
418 (*) There is no guarantee that any of the memory accesses specified before a
421 access queue that accesses of the appropriate type may not cross.
426 of the first CPU's accesses occur, but see the next point:
429 from a second CPU's accesses, even _if_ the second CPU uses a memory
434 hardware[*] will not reorder the memory accesses. CPU cache coherency
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/linux-3.4.99/Documentation/devicetree/bindings/mtd/
Dgpio-control-nand.txt10 resource describes the data bus connected to the NAND flash and all accesses
23 location used to guard against bus reordering with regards to accesses to
26 read to ensure that the GPIO accesses have completed.
/linux-3.4.99/Documentation/devicetree/bindings/tty/serial/
Dsnps-dw-apb-uart.txt12 - reg-io-width : the size (in bytes) of the IO accesses that should be
14 accesses are used.
Dof-serial.txt25 - reg-io-width : the size (in bytes) of the IO accesses that should be
27 accesses to the UART (e.g. TI davinci).
/linux-3.4.99/Documentation/hwmon/
Dw83627hf5 * Winbond W83627HF (ISA accesses ONLY)
41 This driver implements support for ISA accesses *only* for
45 This driver supports ISA accesses, which should be more reliable
46 than i2c accesses. Also, for Tyan boards which contain both a
51 If you really want i2c accesses for these Super I/O chips,
Dlm7024 the driver accesses the LM70 using SPI communication: 16 SCLK cycles
Dzl610082 commands) as request to execute the command in question. Unless write accesses
100 bus accesses. According to Intersil, the minimum interval is 2 ms, though 1 ms
Dmax665029 The driver provides the following sensor accesses in sysfs:
/linux-3.4.99/arch/mips/cavium-octeon/
DKconfig27 and stores. Normally unaligned accesses are fixed using a kernel
31 accesses.
38 CVMSEG LM is a segment that accesses portions of the dcache as a
/linux-3.4.99/Documentation/devicetree/bindings/arm/
Dl2cc.txt20 - arm,data-latency : Cycles of latency for Data RAM accesses. Specifies 3 cells of
23 - arm,tag-latency : Cycles of latency for Tag RAM accesses. Specifies 3 cells of
/linux-3.4.99/arch/cris/include/arch-v32/mach-fs/mach/
Darbiter.h24 unsigned long clients, unsigned long accesses,
/linux-3.4.99/arch/cris/include/arch-v32/mach-a3/mach/
Darbiter.h30 unsigned long clients, unsigned long accesses,
/linux-3.4.99/arch/
DKconfig82 Some architectures are unable to perform unaligned accesses
84 unable to perform such accesses efficiently (e.g. trap on
89 perform unaligned accesses efficiently to allow different
96 information on the topic of unaligned memory accesses.
/linux-3.4.99/Documentation/trace/
Dmmiotrace.txt10 Jeff Muizelaar created a tool for tracing MMIO accesses with the Nouveau
61 accesses to areas that are ioremapped while mmiotrace is active.
107 MMIO accesses are recorded via page faults. Just before __ioremap() returns,
147 zero if it is not recorded. PID is always zero as tracing MMIO accesses
/linux-3.4.99/arch/cris/arch-v32/mach-a3/
Darbiter.c363 unsigned long clients, unsigned long accesses, in crisv32_arbiter_watch() argument
417 rw_op, accesses); in crisv32_arbiter_watch()
433 rw_op, accesses); in crisv32_arbiter_watch()
/linux-3.4.99/arch/cris/arch-v32/mach-fs/
Darbiter.c264 unsigned long clients, unsigned long accesses, in crisv32_arbiter_watch() argument
294 accesses); in crisv32_arbiter_watch()
/linux-3.4.99/Documentation/devicetree/bindings/net/
Dsmsc911x.txt15 - reg-io-width : Specify the size (in bytes) of the IO accesses that
/linux-3.4.99/Documentation/vm/
Dpage_migration35 accesses and may use the result to move pages to more advantageous
96 and set to not being uptodate so that all accesses to the new
100 accesses to the new page will discover a page with the correct settings.
Dnuma32 bandwidths than accesses to memory on other, remote cells. NUMA platforms
48 CPUs, memory and/or IO buses. And, again, memory accesses to memory on
50 faster access times and higher effective bandwidth than accesses to more
/linux-3.4.99/Documentation/m68k/
DREADME.buddha122 accesses are Byte-wide and have to be made slower according
181 fast accesses) depend on the accelerator card used in the
203 always shows a "no IRQ here" on the Buddha, and accesses to
/linux-3.4.99/Documentation/driver-model/
Doverview.txt61 The PCI bus layer freely accesses the fields of struct device. It knows about
70 (and not the device layer) accesses the struct device, it is only the bus
/linux-3.4.99/arch/xtensa/
DKconfig79 memory accesses in hardware but through an exception handler.
80 Per default, unaligned memory accesses are disabled in user space.

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