Home
last modified time | relevance | path

Searched refs:V (Results 1 – 25 of 236) sorted by relevance

12345678910

/linux-3.4.99/Documentation/hwmon/
Dmc13783-adc36 0 Battery Voltage (BATT) 2.50 - 4.65V -2.40V
38 2 Application Supply (BP) 2.50 - 4.65V -2.40V
39 3 Charger Voltage (CHRGRAW) 0 - 10V / /5
40 0 - 20V /10
41 4 Charger Current (CHRGISNSP-CHRGISNSN) -0.25 - 0.25V x4
42 5 General Purpose ADIN5 / Battery Pack Thermistor 0 - 2.30V No
43 6 General Purpose ADIN6 / Backup Voltage (LICELL) 0 - 2.30V / No /
44 1.50 - 3.50V -1.20V
45 7 General Purpose ADIN7 / UID / Die Temperature 0 - 2.30V / No /
46 0 - 2.55V / x0.9 / No
[all …]
Ddme173774 in0: +5VTR (+5V standby) 0V - 6.64V
75 in1: Vccp (processor core) 0V - 3V
76 in2: VCC (internal +3.3V) 0V - 4.38V
77 in3: +5V 0V - 6.64V
78 in4: +12V 0V - 16V
79 in5: VTR (+3.3V standby) 0V - 4.38V
80 in6: Vbat (+3.0V) 0V - 4.38V
83 in0: +2.5V 0V - 3.32V
84 in1: Vccp (processor core) 0V - 2V
85 in2: VCC (internal +3.3V) 0V - 4.38V
[all …]
Dads101542 0: +/- 6.144 V
43 1: +/- 4.096 V
44 2: +/- 2.048 V
45 3: +/- 1.024 V
46 4: +/- 0.512 V
47 5: +/- 0.256 V
65 In this case only in2_input (FS +/- 4.096 V, 128 SPS) and in4_input
66 (FS +/- 0.512 V, 2400 SPS) would be created.
Dsmsc47m19235 each voltage channel is 0V ... 255/192*(nominal voltage), the resolution
40 The +12V analog voltage input channel (in4_input) is multiplexed with
42 a +12V voltage measurement or a 5 bit CPU VID, but not both.
43 The default setting is to use the pin as 12V input, and use only 4 bit VID.
55 in0_input - +2.5V voltage input
56 in1_input - CPU voltage input (nominal 2.25V)
57 in2_input - +3.3V voltage input
58 in3_input - +5V voltage input
59 in4_input - +12V voltage input (may be missing if used as VID4)
60 in5_input - Vcc voltage input (nominal 3.3V)
[all …]
Df71805f56 range is thus from 0 to 2.040 V. Voltage values outside of this range
58 the chip's own power source (+3.3V), and is divided internally by a
70 in0 VCC VCC3.3V int. int. 2.00 1.65 V
71 in1 VIN1 VTT1.2V 10K - 1.00 1.20 V
72 in2 VIN2 VRAM 100K 100K 2.00 ~1.25 V (1)
73 in3 VIN3 VCHIPSET 47K 100K 1.47 2.24 V (2)
74 in4 VIN4 VCC5V 200K 47K 5.25 0.95 V
75 in5 VIN5 +12V 200K 20K 11.00 1.05 V
76 in6 VIN6 VCC1.5V 10K - 1.00 1.50 V
77 in7 VIN7 VCORE 10K - 1.00 ~1.40 V (1)
[all …]
Dadm102529 are provided, for monitoring +2.5V, +3.3V, +5V and +12V power supplies and
36 different manners. It can act as the +12V power-supply voltage analog
43 properly, you'll have a wrong +12V reading or a wrong VID reading. The way
Dvt121163 UCH2 in1 temp4 +2.5V
65 UCH4 in3 temp6 +5V
66 UCH5 in4 temp7 +12V
67 +3.3V in5 Internal VCC (+3.3V)
74 range is thus from 0 to 2.60V. Voltage values outside of this range need
88 +2.5V 2K 10K 1.2 2083 mV
90 +5V 14K 10K 2.4 2083 mV
91 +12V 47K 10K 5.7 2105 mV
92 +3.3V (int) 2K 3.4K 1.588 3300 mV (2)
93 +3.3V (ext) 6.8K 10K 1.68 1964 mV
[all …]
/linux-3.4.99/arch/frv/include/asm/
Dmb93493-regs.h21 #define __set_MB93493(X,V) \ argument
23 *(volatile unsigned long *)(__region_CS3 + (X)) = (V); mb(); \
27 #define __set_MB93493_STSR(X,V) __set_MB93493(0x3c0 + (X) * 4, (V)) argument
32 #define __set_MB93493_IQSR(X,V) __set_MB93493(0x3d0 + (X) * 4, (V)) argument
35 #define __set_MB93493_DQSR(X,V) __set_MB93493(0x3e0 + (X) * 4, (V)) argument
38 #define __set_MB93493_LBSER(V) __set_MB93493(0x3f0, (V)) argument
50 #define __set_MB93493_LBSR(V) __set_MB93493(0x3fc, (V)) argument
56 #define __set_MB93493_VDC(X,V) __set_MB93493(MB93493_VDC_##X, (V)) argument
94 #define __set_MB93493_VCC(X,V) __set_MB93493(MB93493_VCC_##X, (V)) argument
179 #define __set_MB93493_I2C(port,X,V) __set_MB93493(MB93493_I2C_##X + ((port)*0x20), (V)) argument
[all …]
Dbusctl-regs.h24 #define __set_LGCR(V) do { *(volatile unsigned long *)(0xfe000010) = (V); } while(0) argument
25 #define __set_LMAICR(V) do { *(volatile unsigned long *)(0xfe000030) = (V); } while(0) argument
26 #define __set_LEMBR(V) do { *(volatile unsigned long *)(0xfe000040) = (V); } while(0) argument
27 #define __set_LEMAM(V) do { *(volatile unsigned long *)(0xfe000048) = (V); } while(0) argument
28 #define __set_LCR(R,V) do { *(volatile unsigned long *)(0xfe000100 + 8*(R)) = (V); } while(0) argument
29 #define __set_LSBR(R,V) do { *(volatile unsigned long *)(0xfe000c00 + 8*(R)) = (V); } while(0) argument
30 #define __set_LSAM(R,V) do { *(volatile unsigned long *)(0xfe000d00 + 8*(R)) = (V); } while(0) argument
Dserial-regs.h24 #define __set_UART0(R,V) do { __reg(UART0_BASE + (R) * 8) = (V) << 24; } while(0) argument
25 #define __set_UART1(R,V) do { __reg(UART1_BASE + (R) * 8) = (V) << 24; } while(0) argument
30 #define __set_UART0_IER(V) __set_UART0(UART_IER,(V)) argument
31 #define __set_UART1_IER(V) __set_UART1(UART_IER,(V)) argument
35 #define __set_UCPSR(V) do { *(volatile unsigned long *)(0xfeff9c90) = (V); } while(0) argument
41 #define __set_UCPVR(V) do { *(volatile unsigned long *)(0xfeff9c98) = (V) << 24; mb(); } while(0) argument
Dtimer-regs.h51 #define __set_TCTR(V) do { *(volatile unsigned long *)(0xfeff9418) = (V); mb(); } while(0) argument
52 #define __set_TPRV(V) do { *(volatile unsigned long *)(0xfeff9420) = (V) << 24; mb(); } while(0) argument
53 #define __set_TPRCKSL(V) do { *(volatile unsigned long *)(0xfeff9428) = (V); mb(); } while(0) argument
54 #define __set_TCSR(T,V) \ argument
55 do { *(volatile unsigned long *)(0xfeff9400 + 8 * (T)) = (V); mb(); } while(0)
57 #define __set_TxCKSL(T,V) \ argument
58 do { *(volatile unsigned long *)(0xfeff9430 + 8 * (T)) = (V); mb(); } while(0)
60 #define __set_TCSR_DATA(T,V) __set_TCSR(T, (V) << 24) argument
61 #define __set_TxCKSL_DATA(T,V) __set_TxCKSL(T, TxCKSL_EIGHT | __TxCKSL_SELECT((V))) argument
Dgpio-regs.h18 #define __set_PDR(V) do { __reg(0xfeff0400) = (V); mb(); } while(0) argument
21 #define __set_GPDR(V) do { __reg(0xfeff0408) = (V); mb(); } while(0) argument
24 #define __set_SIR(V) do { __reg(0xfeff0410) = (V); mb(); } while(0) argument
27 #define __set_SOR(V) do { __reg(0xfeff0418) = (V); mb(); } while(0) argument
29 #define __set_PDSR(V) do { __reg(0xfeff0420) = (V); mb(); } while(0) argument
31 #define __set_PDCR(V) do { __reg(0xfeff0428) = (V); mb(); } while(0) argument
34 #define __set_RSTR(V) do { __reg(0xfeff0500) = (V); mb(); } while(0) argument
Dirc-regs.h19 #define __set_TM1(V) do { __reg(0xfeff9808) = (V); mb(); } while(0) argument
21 #define __set_TM1x(XI,V) \ argument
26 tm1 |= (V) << shift; \
47 #define __set_IRR(N,V) do { __reg(0xfeff9840 + (N) * 8) = (V); } while(0) argument
50 #define __set_IITMR(N,V) do { __reg(0xfeff9880 + (N) * 8) = (V); } while(0) argument
Dspr-regs.h59 #define __set_PSR(V) do { asm volatile("movgs %0,psr" : : "r"(V)); } while(0) argument
159 #define __set_HSR(R,V) do { asm volatile("movgs %0,hsr"#R : : "r"(V)); } while(0)
333 #define __set_IAMPR(R,V) do { asm volatile("movgs %0,iampr"#R : : "r"(V)); } while(0)
334 #define __set_DAMPR(R,V) do { asm volatile("movgs %0,dampr"#R : : "r"(V)); } while(0)
336 #define __set_IAMLR(R,V) do { asm volatile("movgs %0,iamlr"#R : : "r"(V)); } while(0)
337 #define __set_DAMLR(R,V) do { asm volatile("movgs %0,damlr"#R : : "r"(V)); } while(0)
/linux-3.4.99/arch/m68k/fpsp040/
Dslogn.S384 fmulx %fp2,%fp2 | ...FP2 IS V=U*U
388 |--U + V*(A1+U*(A2+U*(A3+U*(A4+U*(A5+U*A6))))) WHICH IS
389 |--[U + V*(A1+V*(A3+V*A5))] + [U*V*(A2+V*(A4+V*A6))]
394 fmuld LOGA6,%fp1 | ...V*A6
395 fmuld LOGA5,%fp2 | ...V*A5
397 faddd LOGA4,%fp1 | ...A4+V*A6
398 faddd LOGA3,%fp2 | ...A3+V*A5
400 fmulx %fp3,%fp1 | ...V*(A4+V*A6)
401 fmulx %fp3,%fp2 | ...V*(A3+V*A5)
403 faddd LOGA2,%fp1 | ...A2+V*(A4+V*A6)
[all …]
Dsatan.S317 |--U + A1*U*V*(A2 + V*(A3 + V)), V = U*U
319 |--THE NATURAL FORM IS U + U*V*(A1 + V*(A2 + V*A3))
322 |--PARTS A1*U*V AND (A2 + ... STUFF) MORE LOAD-BALANCED
328 faddx %fp1,%fp2 | ...A3+V
329 fmulx %fp1,%fp2 | ...V*(A3+V)
330 fmulx %fp0,%fp1 | ...U*V
331 faddd ATANA2,%fp2 | ...A2+V*(A3+V)
332 fmuld ATANA1,%fp1 | ...A1*U*V
333 fmulx %fp2,%fp1 | ...A1*U*V*(A2+V*(A3+V))
/linux-3.4.99/drivers/media/dvb/frontends/
Dmb86a16.c780 static int swp_freq_calcuation(struct mb86a16_state *state, int i, int v, int *V, int vmax, int vm… in swp_freq_calcuation() argument
788 (*(V + 30 + v) >= 0) && in swp_freq_calcuation()
789 (*(V + 30 + v - 1) >= 0) && in swp_freq_calcuation()
790 (*(V + 30 + v - 1) > *(V + 30 + v)) && in swp_freq_calcuation()
791 (*(V + 30 + v - 1) > SIGMIN)) { in swp_freq_calcuation()
794 *SIG1 = *(V + 30 + v - 1); in swp_freq_calcuation()
796 (*(V + 30 + v) >= 0) && in swp_freq_calcuation()
797 (*(V + 30 + v - 1) >= 0) && in swp_freq_calcuation()
798 (*(V + 30 + v) > *(V + 30 + v - 1)) && in swp_freq_calcuation()
799 (*(V + 30 + v) > SIGMIN)) { in swp_freq_calcuation()
[all …]
/linux-3.4.99/Documentation/fb/
Dviafb.modes29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz
95 # D: 43.163 MHz, H: 50.900 kHz, V: 100.00 Hz
116 # D: 52.406 MHz, H: 61.800 kHz, V: 120.00 Hz
137 # D: 26.880 MHz, H: 30.000 kHz, V: 60.24 Hz
158 # D: 29.500 MHz, H: 29.738 kHz, V: 60.00 Hz
179 # D: 32.668 MHz, H: 35.820 kHz, V: 60.00 Hz
200 # D: 40.00 MHz, H: 37.879 kHz, V: 60.32 Hz
[all …]
/linux-3.4.99/drivers/hv/
DKconfig1 menu "Microsoft Hyper-V guest support"
4 tristate "Microsoft Hyper-V client drivers"
7 Select this option to run Linux as a Hyper-V client operating
11 tristate "Microsoft Hyper-V Utilities driver"
14 Select this option to enable the Hyper-V Utilities.
/linux-3.4.99/arch/frv/mb93090-mb00/
Dpci-vdk.c68 #define __set_PciCfgDataB(A,V) \ argument
69 writeb((V), (volatile void __iomem *) __region_CS1 + 0x88 + (3 - ((A) & 3)))
71 #define __set_PciCfgDataW(A,V) \ argument
72 writew((V), (volatile void __iomem *) __region_CS1 + 0x88 + (2 - ((A) & 2)))
74 #define __set_PciCfgDataL(A,V) \ argument
75 writel((V), (volatile void __iomem *) __region_CS1 + 0x88)
81 #define __set_PciBridgeDataB(A,V) writeb((V), (volatile void __iomem *) __region_CS1 + 0x800 + (A)) argument
82 #define __set_PciBridgeDataW(A,V) writew((V), (volatile void __iomem *) __region_CS1 + 0x800 + (A)) argument
83 #define __set_PciBridgeDataL(A,V) writel((V), (volatile void __iomem *) __region_CS1 + 0x800 + (A)) argument
/linux-3.4.99/Documentation/devicetree/bindings/hwmon/
Dads1015.txt19 0: +/- 6.144 V
20 1: +/- 4.096 V
21 2: +/- 2.048 V (default)
22 3: +/- 1.024 V
23 4: +/- 0.512 V
24 5: +/- 0.256 V
/linux-3.4.99/arch/mips/cavium-octeon/executive/
Dcvmx-l2c.c471 if (tag.s.V && (tag.s.addr == tag_addr)) { in cvmx_l2c_unlock_line()
488 if (tag.s.V && (tag.s.addr == tag_addr)) { in cvmx_l2c_unlock_line()
521 uint64_t V:1; /* Line valid */ member
529 uint64_t V:1; /* Line valid */ member
537 uint64_t V:1; /* Line valid */ member
545 uint64_t V:1; /* Line valid */ member
553 uint64_t V:1; /* Line valid */ member
665 tag.s.V = l2c_tadx_tag.s.valid; in cvmx_l2c_get_tag()
680 tag.s.V = tmp_tag.cn58xx.V; in cvmx_l2c_get_tag()
686 tag.s.V = tmp_tag.cn38xx.V; in cvmx_l2c_get_tag()
[all …]
/linux-3.4.99/crypto/
Dansi_cprng.c52 unsigned char V[DEFAULT_BLK_SZ]; member
100 hexdump("Input V: ", ctx->V, DEFAULT_BLK_SZ); in _get_more_prng_bytes()
124 xor_vectors(ctx->I, ctx->V, tmp, DEFAULT_BLK_SZ); in _get_more_prng_bytes()
156 output = ctx->V; in _get_more_prng_bytes()
181 hexdump("Output V: ", ctx->V, DEFAULT_BLK_SZ); in _get_more_prng_bytes()
281 unsigned char *V, unsigned char *DT) in reset_prng_context() argument
294 if (V) in reset_prng_context()
295 memcpy(ctx->V, V, DEFAULT_BLK_SZ); in reset_prng_context()
297 memcpy(ctx->V, DEFAULT_V_SEED, DEFAULT_BLK_SZ); in reset_prng_context()
/linux-3.4.99/fs/sysv/
DKconfig2 tristate "System V/Xenix/V7/Coherent file system support"
14 UnixWare, Dell Unix and System V programs under Linux. It is
21 network using NFS, you don't need the System V file system support
28 nothing whatsoever to do with the option "System V IPC". Read about
29 the System V file system in
/linux-3.4.99/arch/mips/math-emu/
Dieee754dp.h75 ieee754dp V = ieee754dp_format(s, e, m); \
77 return ieee754dp_xcpt(V, name, a0, a1); \
79 return V; \

12345678910