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Searched refs:U300_SYSCON_CCR (Results 1 – 3 of 3) sorted by relevance

/linux-3.4.99/arch/arm/mach-u300/
Dclock.c213 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR); in syscon_clk_get_rate()
227 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR); in enable_i2s0_vcxo()
229 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); in enable_i2s0_vcxo()
231 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); in enable_i2s0_vcxo()
245 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR); in enable_i2s1_vcxo()
247 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); in enable_i2s1_vcxo()
249 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); in enable_i2s1_vcxo()
263 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR); in disable_i2s0_vcxo()
265 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); in disable_i2s0_vcxo()
269 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); in disable_i2s0_vcxo()
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Dcore.c1815 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR); in u300_init_devices()
1817 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); in u300_init_devices()
/linux-3.4.99/arch/arm/mach-u300/include/mach/
Dsyscon.h23 #define U300_SYSCON_CCR (0x0000) macro