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Searched refs:REG_RMW_FIELD (Results 1 – 14 of 14) sorted by relevance

/linux-3.4.99/drivers/net/wireless/ath/ath9k/
Dar9003_paprd.c60 REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B0, in ar9003_paprd_enable()
63 REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B1, in ar9003_paprd_enable()
66 REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B2, in ar9003_paprd_enable()
161 REG_RMW_FIELD(ah, AR_PHY_PAPRD_AM2AM, AR_PHY_PAPRD_AM2AM_MASK, in ar9003_paprd_setup_single_table()
163 REG_RMW_FIELD(ah, AR_PHY_PAPRD_AM2PM, AR_PHY_PAPRD_AM2PM_MASK, in ar9003_paprd_setup_single_table()
165 REG_RMW_FIELD(ah, AR_PHY_PAPRD_HT40, AR_PHY_PAPRD_HT40_MASK, in ar9003_paprd_setup_single_table()
169 REG_RMW_FIELD(ah, ctrl0[i], in ar9003_paprd_setup_single_table()
171 REG_RMW_FIELD(ah, ctrl1[i], in ar9003_paprd_setup_single_table()
173 REG_RMW_FIELD(ah, ctrl1[i], in ar9003_paprd_setup_single_table()
175 REG_RMW_FIELD(ah, ctrl1[i], in ar9003_paprd_setup_single_table()
[all …]
Dar9003_phy.c140 REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_SYNTH4, in ar9003_hw_set_channel()
229 REG_RMW_FIELD(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_spur_mitigate_mrc_cck()
231 REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT, in ar9003_hw_spur_mitigate_mrc_cck()
233 REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT, in ar9003_hw_spur_mitigate_mrc_cck()
236 REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT, in ar9003_hw_spur_mitigate_mrc_cck()
239 REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT, in ar9003_hw_spur_mitigate_mrc_cck()
247 REG_RMW_FIELD(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_spur_mitigate_mrc_cck()
249 REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT, in ar9003_hw_spur_mitigate_mrc_cck()
251 REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT, in ar9003_hw_spur_mitigate_mrc_cck()
258 REG_RMW_FIELD(ah, AR_PHY_TIMING4, in ar9003_hw_spur_ofdm_clear()
[all …]
Dar9002_calib.c57 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0), in ar9002_hw_setup_calibration()
247 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i), in ar9002_hw_iqcalibrate()
250 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i), in ar9002_hw_iqcalibrate()
394 REG_RMW_FIELD(ah, AR_PHY_CH0_TX_PWRCTRL11, in ar9287_hw_olc_temp_compensation()
396 REG_RMW_FIELD(ah, AR_PHY_CH1_TX_PWRCTRL11, in ar9287_hw_olc_temp_compensation()
424 REG_RMW_FIELD(ah, in ar9280_hw_olc_temp_compensation()
457 REG_RMW_FIELD(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC, 1); in ar9271_hw_pa_cal()
459 REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1, 1); in ar9271_hw_pa_cal()
461 REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I, 1); in ar9271_hw_pa_cal()
463 REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF, 1); in ar9271_hw_pa_cal()
[all …]
Dar5008_phy.c839 REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_ADC_ON, 0xa); in ar5008_hw_process_ini()
926 REG_RMW_FIELD(ah, AR_PHY_TIMING3, in ar5008_hw_set_delta_slope()
928 REG_RMW_FIELD(ah, AR_PHY_TIMING3, in ar5008_hw_set_delta_slope()
936 REG_RMW_FIELD(ah, AR_PHY_HALFGI, in ar5008_hw_set_delta_slope()
938 REG_RMW_FIELD(ah, AR_PHY_HALFGI, in ar5008_hw_set_delta_slope()
1029 REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, in ar5008_hw_ani_control_old()
1032 REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, in ar5008_hw_ani_control_old()
1035 REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, in ar5008_hw_ani_control_old()
1038 REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, in ar5008_hw_ani_control_old()
1058 REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar5008_hw_ani_control_old()
[all …]
Deeprom_def.c64 REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL6_0, in ath9k_olc_get_pdadcs()
66 REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL6_1, in ath9k_olc_get_pdadcs()
69 REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL7, in ath9k_olc_get_pdadcs()
489 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_def_set_gain()
492 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_def_set_gain()
495 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_def_set_gain()
498 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_def_set_gain()
516 REG_RMW_FIELD(ah, in ath9k_hw_def_set_gain()
519 REG_RMW_FIELD(ah, in ath9k_hw_def_set_gain()
621 REG_RMW_FIELD(ah, AR_PHY_XPA_CFG, AR_PHY_FORCE_XPA_CFG, in ath9k_hw_def_set_board_values()
[all …]
Deeprom_4k.c397 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, in ath9k_hw_set_4k_power_cal_table()
399 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1, in ath9k_hw_set_4k_power_cal_table()
401 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2, in ath9k_hw_set_4k_power_cal_table()
403 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, 0); in ath9k_hw_set_4k_power_cal_table()
778 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ath9k_hw_4k_set_gain()
780 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ath9k_hw_4k_set_gain()
782 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ath9k_hw_4k_set_gain()
785 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ath9k_hw_4k_set_gain()
789 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ath9k_hw_4k_set_gain()
792 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ath9k_hw_4k_set_gain()
[all …]
Dar9003_mci.c25 REG_RMW_FIELD(ah, AR_MCI_COMMAND2, in ar9003_mci_reset_req_wakeup()
28 REG_RMW_FIELD(ah, AR_MCI_COMMAND2, in ar9003_mci_reset_req_wakeup()
452 REG_RMW_FIELD(ah, AR_PHY_GLB_CONTROL, AR_GLB_DS_JTAG_DISABLE, 1); in ar9003_mci_observation_set_up()
453 REG_RMW_FIELD(ah, AR_PHY_GLB_CONTROL, AR_GLB_WLAN_UART_INTF_EN, 0); in ar9003_mci_observation_set_up()
456 REG_RMW_FIELD(ah, AR_BTCOEX_CTRL2, AR_BTCOEX_CTRL2_GPIO_OBS_SEL, 0); in ar9003_mci_observation_set_up()
457 REG_RMW_FIELD(ah, AR_BTCOEX_CTRL2, AR_BTCOEX_CTRL2_MAC_BB_OBS_SEL, 1); in ar9003_mci_observation_set_up()
459 REG_RMW_FIELD(ah, AR_DIAG_SW, AR_DIAG_OBS_PT_SEL1, 0x03); in ar9003_mci_observation_set_up()
460 REG_RMW_FIELD(ah, AR_DIAG_SW, AR_DIAG_OBS_PT_SEL2, 0x01); in ar9003_mci_observation_set_up()
461 REG_RMW_FIELD(ah, AR_MACMISC, AR_MACMISC_MISC_OBS_BUS_LSB, 0x02); in ar9003_mci_observation_set_up()
462 REG_RMW_FIELD(ah, AR_MACMISC, AR_MACMISC_MISC_OBS_BUS_MSB, 0x03); in ar9003_mci_observation_set_up()
[all …]
Dar9003_calib.c50 REG_RMW_FIELD(ah, AR_PHY_TIMING4, in ar9003_hw_setup_calibration()
62 REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM, in ar9003_hw_setup_calibration()
64 REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM, in ar9003_hw_setup_calibration()
282 REG_RMW_FIELD(ah, offset_array[i], in ar9003_hw_iqcalibrate()
285 REG_RMW_FIELD(ah, offset_array[i], in ar9003_hw_iqcalibrate()
705 REG_RMW_FIELD(ah, tx_corr_coeff[im][i], in ar9003_hw_tx_iqcal_load_avg_2_passes()
709 REG_RMW_FIELD(ah, tx_corr_coeff[im][i], in ar9003_hw_tx_iqcal_load_avg_2_passes()
721 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3, in ar9003_hw_tx_iqcal_load_avg_2_passes()
723 REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0, in ar9003_hw_tx_iqcal_load_avg_2_passes()
740 REG_RMW_FIELD(ah, AR_PHY_TX_FORCED_GAIN, in ar9003_hw_tx_iq_cal_run()
[all …]
Dbtcoex.c145 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, in ath9k_hw_btcoex_init_2wire()
165 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, in ath9k_hw_btcoex_init_3wire()
169 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, in ath9k_hw_btcoex_init_3wire()
256 REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1); in ath9k_hw_btcoex_enable_3wire()
257 REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0); in ath9k_hw_btcoex_enable_3wire()
272 REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1); in ath9k_hw_btcoex_enable_mci()
Deeprom_9287.c461 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, in ath9k_hw_set_ar9287_power_cal_table()
463 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1, in ath9k_hw_set_ar9287_power_cal_table()
465 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2, in ath9k_hw_set_ar9287_power_cal_table()
467 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, in ath9k_hw_set_ar9287_power_cal_table()
953 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_ar9287_set_board_values()
956 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_ar9287_set_board_values()
959 REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset, in ath9k_hw_ar9287_set_board_values()
962 REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset, in ath9k_hw_ar9287_set_board_values()
969 REG_RMW_FIELD(ah, AR_PHY_SETTLING, in ath9k_hw_ar9287_set_board_values()
972 REG_RMW_FIELD(ah, AR_PHY_SETTLING, in ath9k_hw_ar9287_set_board_values()
[all …]
Dhw.c755 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2, in ath9k_hw_init_pll()
757 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2, in ath9k_hw_init_pll()
759 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2, in ath9k_hw_init_pll()
762 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL1, in ath9k_hw_init_pll()
764 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL1, in ath9k_hw_init_pll()
766 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL1, in ath9k_hw_init_pll()
769 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2, in ath9k_hw_init_pll()
771 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2, in ath9k_hw_init_pll()
773 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2, in ath9k_hw_init_pll()
777 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL3, in ath9k_hw_init_pll()
[all …]
Dar9003_rtt.c49 REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL, in ar9003_hw_rtt_set_mask()
60 REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL, in ar9003_hw_rtt_force_restore()
Dar9003_eeprom.c3525 REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias); in ar9003_hw_xpa_bias_level_apply()
3527 REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias); in ar9003_hw_xpa_bias_level_apply()
3529 REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias); in ar9003_hw_xpa_bias_level_apply()
3530 REG_RMW_FIELD(ah, AR_CH0_THERM, in ar9003_hw_xpa_bias_level_apply()
3533 REG_RMW_FIELD(ah, AR_CH0_THERM, in ar9003_hw_xpa_bias_level_apply()
3610 REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM, in ar9003_hw_ant_ctrl_apply()
3613 REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM, in ar9003_hw_ant_ctrl_apply()
3632 REG_RMW_FIELD(ah, AR_PHY_GLB_CONTROL, in ar9003_hw_ant_ctrl_apply()
3637 REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM_2, AR_SWITCH_TABLE_COM2_ALL, value); in ar9003_hw_ant_ctrl_apply()
3644 REG_RMW_FIELD(ah, switch_chain_reg[chain], in ar9003_hw_ant_ctrl_apply()
[all …]
Dhw.h104 #define REG_RMW_FIELD(_a, _r, _f, _v) \ macro