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Searched refs:PLL_BASE_DIVM_SHIFT (Results 1 – 2 of 2) sorted by relevance

/linux-3.4.99/arch/arm/mach-tegra/
Dtegra30_clocks.c155 #define PLL_BASE_DIVM_SHIFT 0 macro
913 c->div = (val & PLL_BASE_DIVM_MASK) >> PLL_BASE_DIVM_SHIFT; in tegra30_pll_clk_init()
1053 if ((cfg.m > (PLL_BASE_DIVM_MASK >> PLL_BASE_DIVM_SHIFT)) || in tegra30_pll_clk_set_rate()
1070 val |= (sel->m << PLL_BASE_DIVM_SHIFT) | in tegra30_pll_clk_set_rate()
Dtegra2_clocks.c91 #define PLL_BASE_DIVM_SHIFT 0 macro
632 c->div = (val & PLL_BASE_DIVM_MASK) >> PLL_BASE_DIVM_SHIFT; in tegra2_pll_clk_init()
684 val |= (sel->m << PLL_BASE_DIVM_SHIFT) | in tegra2_pll_clk_set_rate()