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Searched refs:DIV_U16 (Results 1 – 3 of 3) sorted by relevance

/linux-3.4.99/arch/arm/mach-tegra/
Dclock.h33 #define DIV_U16 (1 << 4) macro
Dtegra2_clocks.c927 } else if (c->flags & DIV_U16) { in tegra2_periph_clk_init()
1066 } else if (c->flags & DIV_U16) { in tegra2_periph_clk_set_rate()
1098 } else if (c->flags & DIV_U16) { in tegra2_periph_clk_round_rate()
2174 …PH_CLK("i2c1", "tegra-i2c.0", NULL, 12, 0x124, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U16),
2175 …PH_CLK("i2c2", "tegra-i2c.1", NULL, 54, 0x198, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U16),
2176 …PH_CLK("i2c3", "tegra-i2c.2", NULL, 67, 0x1b8, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U16),
2177 …IPH_CLK("dvc", "tegra-i2c.3", NULL, 47, 0x128, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U16),
Dtegra30_clocks.c1459 } else if (c->flags & DIV_U16) { in tegra30_periph_clk_init()
1595 } else if (c->flags & DIV_U16) { in tegra30_periph_clk_set_rate()
1628 } else if (c->flags & DIV_U16) { in tegra30_periph_clk_round_rate()
2922 …PERIPH_CLK("i2c1", "tegra-i2c.0", NULL, 12, 0x124, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PER…
2923 …PERIPH_CLK("i2c2", "tegra-i2c.1", NULL, 54, 0x198, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PER…
2924 …PERIPH_CLK("i2c3", "tegra-i2c.2", NULL, 67, 0x1b8, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PER…
2925 …PERIPH_CLK("i2c4", "tegra-i2c.3", NULL, 103, 0x3c4, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PE…
2926 …PERIPH_CLK("i2c5", "tegra-i2c.4", NULL, 47, 0x128, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PER…