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Searched refs:en_reg_bit (Results 1 – 4 of 4) sorted by relevance

/linux-2.6.39/arch/arm/mach-spear6xx/
Dclock.c37 .en_reg_bit = RTC_CLK_ENB,
74 .en_reg_bit = PLL_ENABLE,
164 .en_reg_bit = AUX_SYNT_ENB,
195 .en_reg_bit = UART0_CLK_ENB,
204 .en_reg_bit = UART1_CLK_ENB,
219 .en_reg_bit = AUX_SYNT_ENB,
250 .en_reg_bit = FIRDA_CLK_ENB,
265 .en_reg_bit = AUX_SYNT_ENB,
296 .en_reg_bit = CLCD_CLK_ENB,
473 .en_reg_bit = USBH0_CLK_ENB,
[all …]
/linux-2.6.39/arch/arm/mach-spear3xx/
Dclock.c37 .en_reg_bit = RTC_CLK_ENB,
74 .en_reg_bit = PLL_ENABLE,
164 .en_reg_bit = AUX_SYNT_ENB,
195 .en_reg_bit = UART_CLK_ENB,
210 .en_reg_bit = AUX_SYNT_ENB,
241 .en_reg_bit = FIRDA_CLK_ENB,
345 .en_reg_bit = GPT1_CLK_ENB,
389 .en_reg_bit = GPT2_CLK_ENB,
400 .en_reg_bit = USBH_CLK_ENB,
408 .en_reg_bit = USBD_CLK_ENB,
[all …]
/linux-2.6.39/arch/arm/plat-spear/
Dclock.c44 val &= ~(1 << clk->en_reg_bit); in generic_clk_enable()
46 val |= 1 << clk->en_reg_bit; in generic_clk_enable()
62 val |= 1 << clk->en_reg_bit; in generic_clk_disable()
64 val &= ~(1 << clk->en_reg_bit); in generic_clk_disable()
/linux-2.6.39/arch/arm/plat-spear/include/plat/
Dclock.h100 u8 en_reg_bit; member