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/linux-2.6.39/arch/powerpc/boot/
Dwrapper38 dts=
89 dts="$1"
124 if [ -n "$dts" ]; then
125 if [ ! -r "$dts" -a -r "$object/dts/$dts" ]; then
126 dts="$object/dts/$dts"
131 $dtc -O dtb -o "$dtb" -b 0 "$dts"
306 if [ -n "$dts" ]; then
/linux-2.6.39/drivers/pps/generators/
Dpps_gen_parport.c73 struct timespec expire_time, ts1, ts2, ts3, dts; in hrtimer_event() local
127 dts = timespec_sub(ts3, ts2); in hrtimer_event()
129 (dev->port_write_time + timespec_to_ns(&dts)) >> 1; in hrtimer_event()
133 dts = timespec_sub(ts1, expire_time); in hrtimer_event()
134 delta = timespec_to_ns(&dts); in hrtimer_event()
/linux-2.6.39/arch/powerpc/boot/dts/
Dgamecube.dts2 * arch/powerpc/boot/dts/gamecube.dts
15 /dts-v1/;
Dp2020rdb_camp_core1.dts4 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
6 * This dts allows core1 to have l2, dma2, eth0, pci1, msi.
8 * Please note to add "-b 1" for core1's dts compiling.
18 /dts-v1/;
Dmpc8572ds_camp_core1.dts4 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
6 * This dts allows core1 to have l2, dma2, eth2, eth3, pci2, msi.
8 * Please note to add "-b 1" for core1's dts compiling.
18 /dts-v1/;
Dwii.dts2 * arch/powerpc/boot/dts/wii.dts
15 /dts-v1/;
Dgef_ppc9a.dts13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
18 * Compiled with dtc -I dts -O dtb -o gef_ppc9a.dtb gef_ppc9a.dts
21 /dts-v1/;
Dgef_sbc610.dts13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
18 * Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts
21 /dts-v1/;
Dgef_sbc310.dts13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
18 * Compiled with dtc -I dts -O dtb -o gef_sbc310.dtb gef_sbc310.dts
21 /dts-v1/;
DkuroboxHD.dts7 * Based on sandpoint.dts
21 /dts-v1/;
DkuroboxHG.dts7 * Based on sandpoint.dts
21 /dts-v1/;
Dsam440ep.dts2 * Device Tree Source for ACube Sam440ep based off bamboo.dts code
8 * Modified from bamboo.dts for sam440ep:
16 /dts-v1/;
Dp2020rdb_camp_core0.dts4 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
6 * This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb,
17 /dts-v1/;
Dps3.dts21 /dts-v1/;
Dsbc8349.dts8 * -based largely on the Freescale MPC834x_MDS dts.
16 /dts-v1/;
Dstorcenter.dts14 /dts-v1/;
Dc2k.dts5 * Originated from prpmc2800.dts
15 /dts-v1/;
Dksi8560.dts6 * Based on mpc8560ads.dts
15 /dts-v1/;
Diss4xx.dts15 /dts-v1/;
Dpdm360ng.dts7 * Based on MPC5121E ADS dts.
16 /dts-v1/;
Dmpc8572ds_camp_core0.dts4 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
6 * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0,
17 /dts-v1/;
Dsbc8641d.dts8 * Based largely on the mpc8641_hpcn.dts by Freescale Semiconductor Inc.
16 /dts-v1/;
/linux-2.6.39/fs/jfs/
Djfs_dtree.h132 #define addressDTS(dts)\ argument
133 ( ((s64)((dts)->addr1)) << 32 | __le32_to_cpu((dts)->addr2) )
/linux-2.6.39/arch/microblaze/boot/
DMakefile55 $(obj)/%.dtb: $(src)/dts/%.dts FORCE
/linux-2.6.39/Documentation/powerpc/
Dbootwrapper.txt80 that the dts file for virtex405 targets should be
81 named (virtex405-<board>.dts). Search the wrapper
103 arch/powerpc/boot/dts/ directory. The Makefile selects the correct device
106 build system will use arch/powerpc/boot/dts/walnut.dts to build
107 treeImage.walnut and arch/powerpc/boot/dts/virtex405-ml403.dts to build

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