Searched refs:UCR1 (Results 1 – 2 of 2) sorted by relevance
59 #define UCR1 0x80 /* Control Register 1 */ macro277 temp = readl(sport->port.membase + UCR1); in imx_stop_tx()279 writel(temp, sport->port.membase + UCR1); in imx_stop_tx()289 temp = readl(sport->port.membase + UCR1); in imx_stop_tx()291 writel(temp, sport->port.membase + UCR1); in imx_stop_tx()300 temp = readl(sport->port.membase + UCR1); in imx_stop_tx()301 writel(temp & ~UCR1_TXMPTYEN, sport->port.membase + UCR1); in imx_stop_tx()360 temp = readl(sport->port.membase + UCR1); in imx_start_tx()362 writel(temp, sport->port.membase + UCR1); in imx_start_tx()365 temp = readl(sport->port.membase + UCR1); in imx_start_tx()[all …]
31 #define UCR1 0x80 macro47 if (!(UART(UCR1) & UCR1_UARTEN)) in putc()