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Searched refs:AT91_DBGU (Results 1 – 19 of 19) sorted by relevance

/linux-2.6.39/arch/arm/mach-at91/include/mach/
Dat91_dbgu.h19 #ifdef AT91_DBGU
20 #define AT91_DBGU_CR (AT91_DBGU + 0x00) /* Control Register */
21 #define AT91_DBGU_MR (AT91_DBGU + 0x04) /* Mode Register */
22 #define AT91_DBGU_IER (AT91_DBGU + 0x08) /* Interrupt Enable Register */
25 #define AT91_DBGU_IDR (AT91_DBGU + 0x0c) /* Interrupt Disable Register */
26 #define AT91_DBGU_IMR (AT91_DBGU + 0x10) /* Interrupt Mask Register */
27 #define AT91_DBGU_SR (AT91_DBGU + 0x14) /* Status Register */
28 #define AT91_DBGU_RHR (AT91_DBGU + 0x18) /* Receiver Holding Register */
29 #define AT91_DBGU_THR (AT91_DBGU + 0x1c) /* Transmitter Holding Register */
30 #define AT91_DBGU_BRGR (AT91_DBGU + 0x20) /* Baud Rate Generator Register */
[all …]
Ddebug-macro.S18 ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address)
19 ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address)
23 strb \rd, [\rx, #(AT91_DBGU_THR - AT91_DBGU)] @ Write to Transmitter Holding Register
27 1001: ldr \rd, [\rx, #(AT91_DBGU_SR - AT91_DBGU)] @ Read Status Register
33 1001: ldr \rd, [\rx, #(AT91_DBGU_SR - AT91_DBGU)] @ Read Status Register
Duncompress.h28 #define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS)
Dat572d940hf.h96 #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) macro
Dat91sam9261.h75 #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) macro
Dat91rm9200.h86 #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) /* Debug Unit */ macro
Dat91sam9rl.h82 #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) macro
Dat91sam9263.h88 #define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) macro
Dat91cap9.h92 #define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) macro
Dat91sam9260.h92 #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) macro
Dat91sam9g45.h98 #define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) macro
/linux-2.6.39/arch/arm/mach-at91/
Dat572d940hf_devices.c653 .start = AT91_VA_BASE_SYS + AT91_DBGU,
654 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
667 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
Dat91sam9261_devices.c820 .start = AT91_VA_BASE_SYS + AT91_DBGU,
821 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
834 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
Dat91rm9200_devices.c883 .start = AT91_VA_BASE_SYS + AT91_DBGU,
884 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
897 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
Dat91sam9rl_devices.c921 .start = AT91_VA_BASE_SYS + AT91_DBGU,
922 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
935 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
Dat91cap9_devices.c1030 .start = AT91_VA_BASE_SYS + AT91_DBGU,
1031 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1044 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
Dat91sam9260_devices.c843 .start = AT91_VA_BASE_SYS + AT91_DBGU,
844 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
857 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
Dat91sam9263_devices.c1201 .start = AT91_VA_BASE_SYS + AT91_DBGU,
1202 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1215 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
Dat91sam9g45_devices.c1315 .start = AT91_VA_BASE_SYS + AT91_DBGU,
1316 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1329 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),