Lines Matching refs:AT91_DBGU
19 #ifdef AT91_DBGU
20 #define AT91_DBGU_CR (AT91_DBGU + 0x00) /* Control Register */
21 #define AT91_DBGU_MR (AT91_DBGU + 0x04) /* Mode Register */
22 #define AT91_DBGU_IER (AT91_DBGU + 0x08) /* Interrupt Enable Register */
25 #define AT91_DBGU_IDR (AT91_DBGU + 0x0c) /* Interrupt Disable Register */
26 #define AT91_DBGU_IMR (AT91_DBGU + 0x10) /* Interrupt Mask Register */
27 #define AT91_DBGU_SR (AT91_DBGU + 0x14) /* Status Register */
28 #define AT91_DBGU_RHR (AT91_DBGU + 0x18) /* Receiver Holding Register */
29 #define AT91_DBGU_THR (AT91_DBGU + 0x1c) /* Transmitter Holding Register */
30 #define AT91_DBGU_BRGR (AT91_DBGU + 0x20) /* Baud Rate Generator Register */
32 #define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */
33 #define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */
34 #define AT91_DBGU_FNR (AT91_DBGU + 0x48) /* Force NTRST Register [SAM9 only] */