Searched refs:simr (Results 1 – 3 of 3) sorted by relevance
46 volatile uint *simr; in cpm2_mask_irq() local51 simr = &(cpm2_immr->im_intctl.ic_simrh); in cpm2_mask_irq()53 simr[word] = ppc_cached_irq_mask[word]; in cpm2_mask_irq()59 volatile uint *simr; in cpm2_unmask_irq() local64 simr = &(cpm2_immr->im_intctl.ic_simrh); in cpm2_unmask_irq()66 simr[word] = ppc_cached_irq_mask[word]; in cpm2_unmask_irq()72 volatile uint *simr, *sipnr; in cpm2_mask_and_ack() local77 simr = &(cpm2_immr->im_intctl.ic_simrh); in cpm2_mask_and_ack()80 simr[word] = ppc_cached_irq_mask[word]; in cpm2_mask_and_ack()87 volatile uint *simr; in cpm2_end_irq() local[all …]
31 u32 simr; in unmask_ioasic_irq() local33 simr = ioasic_read(IO_REG_SIMR); in unmask_ioasic_irq()34 simr |= (1 << (irq - ioasic_irq_base)); in unmask_ioasic_irq()35 ioasic_write(IO_REG_SIMR, simr); in unmask_ioasic_irq()40 u32 simr; in mask_ioasic_irq() local42 simr = ioasic_read(IO_REG_SIMR); in mask_ioasic_irq()43 simr &= ~(1 << (irq - ioasic_irq_base)); in mask_ioasic_irq()44 ioasic_write(IO_REG_SIMR, simr); in mask_ioasic_irq()
190 lw t1,IO_REG_SIMR(t2) # get mask: IOASIC simr