/linux-2.4.37.9/drivers/ieee1394/ |
D | ohci1394.c | 234 reg_write(ohci, OHCI1394_PhyControl, (addr << 8) | 0x00008000); in get_phy_reg() 262 reg_write(ohci, OHCI1394_PhyControl, (addr << 8) | data | 0x00004000); in set_phy_reg() 362 reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset); in ohci_soft_reset() 392 reg_write(ohci, reg, 0x8000); in run_context() 434 reg_write(ohci, d->ctrlClear, 0xffffffff); in initialize_dma_rcv_ctx() 437 reg_write(ohci, d->ctrlSet, 0xd0000000); in initialize_dma_rcv_ctx() 440 reg_write(ohci, d->ctxtMatch, 0xf0000000); in initialize_dma_rcv_ctx() 443 reg_write(ohci, OHCI1394_IRMultiChanMaskHiClear, 0xffffffff); in initialize_dma_rcv_ctx() 444 reg_write(ohci, OHCI1394_IRMultiChanMaskLoClear, 0xffffffff); in initialize_dma_rcv_ctx() 447 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1 << d->ctx); in initialize_dma_rcv_ctx() [all …]
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D | pcilynx.c | 98 …reg_write((struct ti_lynx *) data, SERIAL_EEPROM_CONTROL, ((struct ti_lynx *) data)->i2c_driven_st… in bit_setscl() 108 …reg_write((struct ti_lynx *) data, SERIAL_EEPROM_CONTROL, ((struct ti_lynx *) data)->i2c_driven_st… in bit_setsda() 251 reg_write(lynx, LINK_PHY, LINK_PHY_READ | LINK_PHY_ADDR(addr)); in get_phy_reg() 264 reg_write(lynx, LINK_INT_STATUS, LINK_INT_PHY_REG_RCVD); in get_phy_reg() 292 reg_write(lynx, LINK_PHY, LINK_PHY_WRITE | LINK_PHY_ADDR(addr) in set_phy_reg() 428 reg_write(lynx, LINK_ID, (0xffc0 | phyid) << 16); in handle_selfid() 733 reg_write(lynx, CYCLE_TIMER, arg); in lynx_devctl() 737 reg_write(lynx, LINK_ID, in lynx_devctl() 754 reg_write(lynx, DMA_CHAN_CTRL(CHANNEL_ASYNC_SEND), 0); in lynx_devctl() 819 reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV), in lynx_devctl() [all …]
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D | pcilynx.h | 133 static inline void reg_write(const struct ti_lynx *lynx, int offset, u32 data) in reg_write() function 146 reg_write(lynx, offset, (reg_read(lynx, offset) | mask)); in reg_set_bits() 152 reg_write(lynx, offset, (reg_read(lynx, offset) & ~mask)); in reg_clear_bits() 469 reg_write(lynx, DMA0_CURRENT_PCL + dmachan * 0x20, in run_sub_pcl() 471 reg_write(lynx, DMA0_CHAN_CTRL + dmachan * 0x20, in run_sub_pcl()
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D | dv1394.c | 634 reg_write(video->ohci, video->ohci_IsoXmitCommandPtr, in frame_prepare() 674 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, 0xFFFFFFFF); in frame_prepare() 690 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, in frame_prepare() 700 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, 0x8000); in frame_prepare() 806 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, 0xFFFFFFFF); in start_dma_receive() 810 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, 0x40000000); in start_dma_receive() 813 reg_write(video->ohci, video->ohci_IsoRcvContextMatch, 0xf0000000 | video->channel); in start_dma_receive() 816 reg_write(video->ohci, video->ohci_IsoRcvCommandPtr, in start_dma_receive() 823 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, 0x8000); in start_dma_receive() 852 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12)); in start_dma_receive() [all …]
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D | video1394.c | 465 reg_write(ohci, d->ctrlClear, 0xf0000000); in initialize_dma_ir_ctx() 468 reg_write(ohci, d->ctrlSet, 0x80000000); in initialize_dma_ir_ctx() 472 reg_write(ohci, d->ctrlSet, 0x40000000); in initialize_dma_ir_ctx() 476 reg_write(ohci, d->ctxMatch, 0xf0000000|((tag&0xf)<<8)|d->channel); in initialize_dma_ir_ctx() 479 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1<<d->ctx); in initialize_dma_ir_ctx() 707 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1<<d->ctx); in initialize_dma_it_ctx() 915 reg_write(ohci, d->cmdPtr, in video1394_ioctl() 919 reg_write(ohci, d->ctrlSet, 0x8000); in video1394_ioctl() 926 reg_write(ohci, d->ctrlSet, 0x1000); in video1394_ioctl() 1101 reg_write(ohci, d->cmdPtr, in video1394_ioctl() [all …]
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D | amdtp.c | 291 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << ctx); in ohci1394_start_it_ctx() 292 reg_write(ohci, OHCI1394_IsoXmitCommandPtr + ctx * 16, first_cmd | z); in ohci1394_start_it_ctx() 293 reg_write(ohci, OHCI1394_IsoXmitContextControlClear + ctx * 16, ~0); in ohci1394_start_it_ctx() 295 reg_write(ohci, OHCI1394_IsoXmitContextControlSet + ctx * 16, in ohci1394_start_it_ctx() 302 reg_write(ohci, OHCI1394_IsoXmitContextControlSet + ctx * 16, in ohci1394_wake_it_ctx() 311 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 1 << ctx); in ohci1394_stop_it_ctx() 312 reg_write(ohci, OHCI1394_IsoXmitContextControlClear + ctx * 16, in ohci1394_stop_it_ctx()
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D | ohci1394.h | 256 static inline void reg_write(const struct ti_ohci *ohci, int offset, u32 data) in reg_write() function
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/linux-2.4.37.9/drivers/atm/ |
D | lanai.c | 584 static inline void reg_write(const struct lanai_dev *lanai, u32 val, in reg_write() function 595 reg_write(lanai, lanai->conf1, Config1_Reg); in conf1_write() 600 reg_write(lanai, lanai->conf2, Config2_Reg); in conf2_write() 606 reg_write(lanai, 0, Reset_Reg); in reset_board() 1210 reg_write(lanai, i, IntControlEna_Reg); in intr_enable() 1215 reg_write(lanai, i, IntControlDis_Reg); in intr_disable() 1401 reg_write(lanai, (ptr << 12) | lvcc->vci, Butt_Reg); in lanai_endtx() 1773 reg_write(lanai, INT_ALL, IntAck_Reg); in lanai_reset() 1792 reg_write(lanai, 0, ServWrite_Reg); in service_buffer_allocate() 1794 reg_write(lanai, in service_buffer_allocate() [all …]
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