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Searched refs:b_int_enable (Results 1 – 8 of 8) sorted by relevance

/linux-2.4.37.9/arch/ia64/sn/io/sn2/pcibr/
Dpcibr_intr.c686 int_enable = bridge->b_int_enable; in pcibr_intr_connect()
688 bridge->b_int_enable = int_enable; in pcibr_intr_connect()
738 int_enable = (uint64_t)bridge->b_int_enable; in pcibr_intr_disconnect()
740 bridge->b_int_enable = (bridgereg_t)int_enable; in pcibr_intr_disconnect()
898 bridge->b_int_enable |= ~BRIDGE_IMR_INT_MSK; in pcibr_xintr_preset()
915 bridge->b_int_enable |= 1 << vect; in pcibr_xintr_preset()
1070 int_enable = (uint64_t)bridge->b_int_enable; in pcibr_intr_func()
1072 bridge->b_int_enable = (bridgereg_t)int_enable; in pcibr_intr_func()
Dpcibr_ate.c91 old_enable = bridge->b_int_enable; in pcibr_init_ext_ate_ram()
93 bridge->b_int_enable = new_enable; in pcibr_init_ext_ate_ram()
107 bridge->b_int_enable = old_enable; in pcibr_init_ext_ate_ram()
Dpcibr_error.c891 bridge->b_int_enable &= (bridgereg_t)(~disable_errintr_mask); in pcibr_error_intr_handler()
Dpcibr_slot.c393 slotp->resp_b_int_enable = bridge->b_int_enable; in pcibr_slot_info_return()
/linux-2.4.37.9/arch/mips/sgi-ip27/
Dip27-irq.c210 bridge->b_int_enable |= (1 << pin); in startup_bridge_irq()
212 bridge->b_int_enable |= 0x7ffffe00; in startup_bridge_irq()
251 bridge->b_int_enable &= ~(1 << pin); in shutdown_bridge_irq()
293 printk("bridge->b_int_enable = 0x%x\n", bridge->b_int_enable); in irq_debug()
Dip27-setup.c274 bridge->b_int_enable = 0; in pcibr_setup()
/linux-2.4.37.9/include/asm-mips64/pci/
Dbridge.h136 bridgereg_t b_int_enable; /* 0x00010C */ member
/linux-2.4.37.9/include/asm-ia64/sn/pci/
Dbridge.h339 #define b_int_enable u_int_enable._b._b_int_enable macro
1699 MACROFIELD_LINE(BRIDGE_INT_ENABLE, b_int_enable)