| /linux-2.4.37.9/include/linux/ |
| D | cache.h | 27 #ifndef __cacheline_aligned
29 #define __cacheline_aligned ____cacheline_aligned macro
31 #define __cacheline_aligned \ macro
39 #define __cacheline_aligned_in_smp __cacheline_aligned
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| /linux-2.4.37.9/include/asm-arm/ |
| D | cache.h | 12 #define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) macro
14 #define __cacheline_aligned \ macro
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| /linux-2.4.37.9/include/asm-sparc64/ |
| D | cache.h | 16 #define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES))) macro
18 #define __cacheline_aligned \ macro
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| /linux-2.4.37.9/include/asm-ia64/ |
| D | numa.h | 33 extern volatile char cpu_to_node_map[NR_CPUS] __cacheline_aligned;
34 extern volatile unsigned long node_to_cpu_mask[NR_NODES] __cacheline_aligned;
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| /linux-2.4.37.9/include/asm-sh64/ |
| D | cache.h | 25 #define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) macro
27 #define __cacheline_aligned \ macro
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| /linux-2.4.37.9/include/asm-ppc/ |
| D | cache.h | 33 #define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) macro
35 #define __cacheline_aligned \ macro
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| /linux-2.4.37.9/arch/ia64/mm/ |
| D | numa.c | 65 volatile char cpu_to_node_map[NR_CPUS] __cacheline_aligned;
68 volatile unsigned long node_to_cpu_mask[NR_NODES] __cacheline_aligned;
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| /linux-2.4.37.9/include/asm-sparc/ |
| D | cache.h | 19 #define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES))) macro
21 #define __cacheline_aligned \ macro
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| /linux-2.4.37.9/kernel/ |
| D | softirq.c | 45 static struct softirq_action softirq_vec[32] __cacheline_aligned;
149 struct tasklet_head tasklet_vec[NR_CPUS] __cacheline_aligned;
150 struct tasklet_head tasklet_hi_vec[NR_CPUS] __cacheline_aligned;
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| D | sched.c | 92 spinlock_t runqueue_lock __cacheline_aligned = SPIN_LOCK_UNLOCKED; /* inner */ variable
93 rwlock_t tasklist_lock __cacheline_aligned = RW_LOCK_UNLOCKED; /* outer */ variable
107 } aligned_data [NR_CPUS] __cacheline_aligned = { {{&init_task,0}}};
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| /linux-2.4.37.9/include/asm-s390x/ |
| D | init.h | 26 #define __cacheline_aligned __attribute__ ((__aligned__(256))) macro
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| /linux-2.4.37.9/include/asm-s390/ |
| D | init.h | 26 #define __cacheline_aligned __attribute__ ((__aligned__(256))) macro
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| /linux-2.4.37.9/arch/x86_64/kernel/ |
| D | syscall.c | 22 sys_call_ptr_t sys_call_table[__NR_syscall_max+1] __cacheline_aligned = {
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| D | init_task.c | 33 struct tss_struct init_tss[NR_CPUS] __cacheline_aligned;
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| D | setup64.c | 27 struct x8664_pda cpu_pda[NR_CPUS] __cacheline_aligned;
45 char boot_cpu_stack[IRQSTACKSIZE] __cacheline_aligned;
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| D | smpboot.c | 66 int cpu_sibling_map[NR_CPUS] __cacheline_aligned;
80 struct cpuinfo_x86 cpu_data[NR_CPUS] __cacheline_aligned;
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| D | smp.c | 107 struct tlb_state cpu_tlbstate[NR_CPUS] __cacheline_aligned = {[0 ... NR_CPUS-1] = { &init_mm, 0, }};
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| /linux-2.4.37.9/arch/i386/kernel/ |
| D | init_task.c | 32 struct tss_struct init_tss[NR_CPUS] __cacheline_aligned = { [0 ... NR_CPUS-1] = INIT_TSS };
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| D | smpboot.c | 70 struct cpuinfo_x86 cpu_data[NR_CPUS] __cacheline_aligned;
966 int cpu_sibling_map[NR_CPUS] __cacheline_aligned;
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| D | smp.c | 108 struct tlb_state cpu_tlbstate[NR_CPUS] __cacheline_aligned = {[0 ... NR_CPUS-1] = { &init_mm, 0, }};
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| /linux-2.4.37.9/include/asm-parisc/ |
| D | cache.h | 29 #define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) macro
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| /linux-2.4.37.9/arch/ia64/sn/kernel/sn2/ |
| D | timer.c | 37 static volatile long rtc_offset __cacheline_aligned; variable
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| D | sn2_smp.c | 63 static spinlock_t sn2_global_ptc_lock __cacheline_aligned = SPIN_LOCK_UNLOCKED; variable
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| /linux-2.4.37.9/arch/ia64/kernel/ |
| D | sal.c | 21 spinlock_t sal_lock __cacheline_aligned = SPIN_LOCK_UNLOCKED; variable
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| /linux-2.4.37.9/arch/ia64/sn/kernel/ |
| D | sn2_smp.c | 63 static spinlock_t sn2_global_ptc_lock __cacheline_aligned = SPIN_LOCK_UNLOCKED; variable
|