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Searched refs:_SB_MAKEMASK1 (Results 1 – 22 of 22) sorted by relevance

/linux-2.4.37.9/include/asm-mips/sibyte/
Dsb1250_syncser.h44 #define M_SYNCSER_CRC_MODE _SB_MAKEMASK1(0)
45 #define M_SYNCSER_MSB_FIRST _SB_MAKEMASK1(1)
51 #define M_SYNCSER_FLAG_EN _SB_MAKEMASK1(6)
52 #define M_SYNCSER_HDLC_EN _SB_MAKEMASK1(7)
53 #define M_SYNCSER_LOOP_MODE _SB_MAKEMASK1(8)
54 #define M_SYNCSER_LOOPBACK _SB_MAKEMASK1(9)
60 #define M_SYNCSER_RXCLK_INV _SB_MAKEMASK1(0)
61 #define M_SYNCSER_RXCLK_EXT _SB_MAKEMASK1(1)
67 #define M_SYNCSER_RXSYNC_LOW _SB_MAKEMASK1(4)
68 #define M_SYNCSER_RXSTRB_LOW _SB_MAKEMASK1(5)
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Dsb1250_uart.h66 #define M_DUART_PARITY_TYPE_ODD _SB_MAKEMASK1(2)
80 #define M_DUART_ERR_MODE _SB_MAKEMASK1(5) /* must be zero */
83 #define M_DUART_RX_IRQ_SEL_RXFULL _SB_MAKEMASK1(6)
85 #define M_DUART_RX_RTS_ENA _SB_MAKEMASK1(7)
95 #define M_DUART_STOP_BIT_LEN_2 _SB_MAKEMASK1(3)
98 #define M_DUART_TX_CTS_ENA _SB_MAKEMASK1(4)
101 #define M_DUART_MODE_RESERVED2 _SB_MAKEMASK1(5) /* must be zero */
121 #define M_DUART_RX_EN _SB_MAKEMASK1(0)
122 #define M_DUART_RX_DIS _SB_MAKEMASK1(1)
123 #define M_DUART_TX_EN _SB_MAKEMASK1(2)
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Dsb1250_int.h123 #define M_INT_WATCHDOG_TIMER_0 _SB_MAKEMASK1(K_INT_WATCHDOG_TIMER_0)
124 #define M_INT_WATCHDOG_TIMER_1 _SB_MAKEMASK1(K_INT_WATCHDOG_TIMER_1)
125 #define M_INT_TIMER_0 _SB_MAKEMASK1(K_INT_TIMER_0)
126 #define M_INT_TIMER_1 _SB_MAKEMASK1(K_INT_TIMER_1)
127 #define M_INT_TIMER_2 _SB_MAKEMASK1(K_INT_TIMER_2)
128 #define M_INT_TIMER_3 _SB_MAKEMASK1(K_INT_TIMER_3)
129 #define M_INT_SMB_0 _SB_MAKEMASK1(K_INT_SMB_0)
130 #define M_INT_SMB_1 _SB_MAKEMASK1(K_INT_SMB_1)
131 #define M_INT_UART_0 _SB_MAKEMASK1(K_INT_UART_0)
132 #define M_INT_UART_1 _SB_MAKEMASK1(K_INT_UART_1)
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Dsb1250_dma.h55 #define M_DMA_DROP _SB_MAKEMASK1(0)
57 #define M_DMA_CHAIN_SEL _SB_MAKEMASK1(1)
58 #define M_DMA_RESERVED1 _SB_MAKEMASK1(2)
73 #define M_DMA_EOP_INT_EN _SB_MAKEMASK1(3)
74 #define M_DMA_HWM_INT_EN _SB_MAKEMASK1(4)
75 #define M_DMA_LWM_INT_EN _SB_MAKEMASK1(5)
76 #define M_DMA_TBX_EN _SB_MAKEMASK1(6)
77 #define M_DMA_TDX_EN _SB_MAKEMASK1(7)
107 #define M_DMA_HDR_CF_EN _SB_MAKEMASK1(0)
108 #define M_DMA_ASIC_XFR_EN _SB_MAKEMASK1(1)
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Dsb1250_genbus.h45 #define M_IO_RDY_ACTIVE _SB_MAKEMASK1(S_IO_RDY_ACTIVE)
48 #define M_IO_ENA_RDY _SB_MAKEMASK1(S_IO_ENA_RDY)
62 #define M_IO_PARITY_ENA _SB_MAKEMASK1(S_IO_PARITY_ENA)
65 #define M_IO_BURST_EN _SB_MAKEMASK1(S_IO_BURST_EN)
68 #define M_IO_PARITY_ODD _SB_MAKEMASK1(S_IO_PARITY_ODD)
70 #define M_IO_NONMUX _SB_MAKEMASK1(S_IO_NONMUX)
109 #define M_IO_EARLY_CS _SB_MAKEMASK1(3)
145 #define M_IO_RDY_SYNC _SB_MAKEMASK1(3)
173 #define M_IO_CS0_ERR_INT _SB_MAKEMASK1(0)
174 #define M_IO_CS1_ERR_INT _SB_MAKEMASK1(1)
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Dsb1250_scd.h172 #define M_SYS_LDT_PLL_BYP _SB_MAKEMASK1(3)
173 #define M_SYS_PCI_SYNC_TEST_MODE _SB_MAKEMASK1(4)
174 #define M_SYS_IOB0_DIV _SB_MAKEMASK1(5)
175 #define M_SYS_IOB1_DIV _SB_MAKEMASK1(6)
182 #define M_SYS_SER0_ENABLE _SB_MAKEMASK1(12)
183 #define M_SYS_SER0_RSTB_EN _SB_MAKEMASK1(13)
184 #define M_SYS_SER1_ENABLE _SB_MAKEMASK1(14)
185 #define M_SYS_SER1_RSTB_EN _SB_MAKEMASK1(15)
186 #define M_SYS_PCMCIA_ENABLE _SB_MAKEMASK1(16)
197 #define M_SYS_PCI_HOST _SB_MAKEMASK1(19)
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Dsb1250_mac.h52 #define M_MAC_RESERVED0 _SB_MAKEMASK1(0)
53 #define M_MAC_TX_HOLD_SOP_EN _SB_MAKEMASK1(1)
54 #define M_MAC_RETRY_EN _SB_MAKEMASK1(2)
55 #define M_MAC_RET_DRPREQ_EN _SB_MAKEMASK1(3)
56 #define M_MAC_RET_UFL_EN _SB_MAKEMASK1(4)
57 #define M_MAC_BURST_EN _SB_MAKEMASK1(5)
83 #define M_MAC_AP_STAT_EN _SB_MAKEMASK1(17)
84 #define M_MAC_RESERVED2 _SB_MAKEMASK1(18)
85 #define M_MAC_DRP_ERRPKT_EN _SB_MAKEMASK1(19)
86 #define M_MAC_DRP_FCSERRPKT_EN _SB_MAKEMASK1(20)
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Dsb1250_l2c.h67 #define M_L2C_TAG_DIRTY _SB_MAKEMASK1(48)
68 #define M_L2C_TAG_VALID _SB_MAKEMASK1(49)
97 #define M_L2C_MGMT_DIRTY _SB_MAKEMASK1(19)
98 #define M_L2C_MGMT_VALID _SB_MAKEMASK1(20)
115 #define M_L2C_MISC_ECC_CLEANUP_DIS _SB_MAKEMASK1(9)
116 #define M_L2C_MISC_MC_PRIO_LOW _SB_MAKEMASK1(8)
117 #define M_L2C_MISC_SOFT_DISABLE_T _SB_MAKEMASK1(7)
118 #define M_L2C_MISC_SOFT_DISABLE_B _SB_MAKEMASK1(6)
119 #define M_L2C_MISC_SOFT_DISABLE_R _SB_MAKEMASK1(5)
120 #define M_L2C_MISC_SOFT_DISABLE_L _SB_MAKEMASK1(4)
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Dsb1250_smbus.h59 #define M_SMB_ERR_INTR _SB_MAKEMASK1(0)
60 #define M_SMB_FINISH_INTR _SB_MAKEMASK1(1)
61 #define M_SMB_DATA_OUT _SB_MAKEMASK1(4)
62 #define M_SMB_DATA_DIR _SB_MAKEMASK1(5)
64 #define M_SMB_CLK_OUT _SB_MAKEMASK1(6)
65 #define M_SMB_DIRECT_ENABLE _SB_MAKEMASK1(7)
71 #define M_SMB_BUSY _SB_MAKEMASK1(0)
72 #define M_SMB_ERROR _SB_MAKEMASK1(1)
73 #define M_SMB_ERROR_TYPE _SB_MAKEMASK1(2)
74 #define M_SMB_REF _SB_MAKEMASK1(6)
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Dsb1250_mc.h104 #define M_MC_IOB1HIGHPRIORITY _SB_MAKEMASK1(52)
125 #define M_MC_ECC_DISABLE _SB_MAKEMASK1(60)
126 #define M_MC_BERR_DISABLE _SB_MAKEMASK1(61)
127 #define M_MC_FORCE_SEQ _SB_MAKEMASK1(62)
128 #define M_MC_DEBUG _SB_MAKEMASK1(63)
195 #define M_MC_REF_DISABLE _SB_MAKEMASK1(30)
198 #define M_MC_DLL_BYPASS _SB_MAKEMASK1(31)
262 #define M_MC_CS0 _SB_MAKEMASK1(4)
263 #define M_MC_CS1 _SB_MAKEMASK1(5)
264 #define M_MC_CS2 _SB_MAKEMASK1(6)
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Dsb1250_defs.h211 #define _SB_MAKEMASK1(n) (_SB_MAKE64(1) << _SB_MAKE64(n)) macro
/linux-2.4.37.9/include/asm-mips64/sibyte/
Dsb1250_syncser.h44 #define M_SYNCSER_CRC_MODE _SB_MAKEMASK1(0)
45 #define M_SYNCSER_MSB_FIRST _SB_MAKEMASK1(1)
51 #define M_SYNCSER_FLAG_EN _SB_MAKEMASK1(6)
52 #define M_SYNCSER_HDLC_EN _SB_MAKEMASK1(7)
53 #define M_SYNCSER_LOOP_MODE _SB_MAKEMASK1(8)
54 #define M_SYNCSER_LOOPBACK _SB_MAKEMASK1(9)
60 #define M_SYNCSER_RXCLK_INV _SB_MAKEMASK1(0)
61 #define M_SYNCSER_RXCLK_EXT _SB_MAKEMASK1(1)
67 #define M_SYNCSER_RXSYNC_LOW _SB_MAKEMASK1(4)
68 #define M_SYNCSER_RXSTRB_LOW _SB_MAKEMASK1(5)
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Dsb1250_uart.h66 #define M_DUART_PARITY_TYPE_ODD _SB_MAKEMASK1(2)
80 #define M_DUART_ERR_MODE _SB_MAKEMASK1(5) /* must be zero */
83 #define M_DUART_RX_IRQ_SEL_RXFULL _SB_MAKEMASK1(6)
85 #define M_DUART_RX_RTS_ENA _SB_MAKEMASK1(7)
95 #define M_DUART_STOP_BIT_LEN_2 _SB_MAKEMASK1(3)
98 #define M_DUART_TX_CTS_ENA _SB_MAKEMASK1(4)
101 #define M_DUART_MODE_RESERVED2 _SB_MAKEMASK1(5) /* must be zero */
121 #define M_DUART_RX_EN _SB_MAKEMASK1(0)
122 #define M_DUART_RX_DIS _SB_MAKEMASK1(1)
123 #define M_DUART_TX_EN _SB_MAKEMASK1(2)
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Dsb1250_int.h123 #define M_INT_WATCHDOG_TIMER_0 _SB_MAKEMASK1(K_INT_WATCHDOG_TIMER_0)
124 #define M_INT_WATCHDOG_TIMER_1 _SB_MAKEMASK1(K_INT_WATCHDOG_TIMER_1)
125 #define M_INT_TIMER_0 _SB_MAKEMASK1(K_INT_TIMER_0)
126 #define M_INT_TIMER_1 _SB_MAKEMASK1(K_INT_TIMER_1)
127 #define M_INT_TIMER_2 _SB_MAKEMASK1(K_INT_TIMER_2)
128 #define M_INT_TIMER_3 _SB_MAKEMASK1(K_INT_TIMER_3)
129 #define M_INT_SMB_0 _SB_MAKEMASK1(K_INT_SMB_0)
130 #define M_INT_SMB_1 _SB_MAKEMASK1(K_INT_SMB_1)
131 #define M_INT_UART_0 _SB_MAKEMASK1(K_INT_UART_0)
132 #define M_INT_UART_1 _SB_MAKEMASK1(K_INT_UART_1)
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Dsb1250_dma.h55 #define M_DMA_DROP _SB_MAKEMASK1(0)
57 #define M_DMA_CHAIN_SEL _SB_MAKEMASK1(1)
58 #define M_DMA_RESERVED1 _SB_MAKEMASK1(2)
73 #define M_DMA_EOP_INT_EN _SB_MAKEMASK1(3)
74 #define M_DMA_HWM_INT_EN _SB_MAKEMASK1(4)
75 #define M_DMA_LWM_INT_EN _SB_MAKEMASK1(5)
76 #define M_DMA_TBX_EN _SB_MAKEMASK1(6)
77 #define M_DMA_TDX_EN _SB_MAKEMASK1(7)
107 #define M_DMA_HDR_CF_EN _SB_MAKEMASK1(0)
108 #define M_DMA_ASIC_XFR_EN _SB_MAKEMASK1(1)
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Dsb1250_genbus.h45 #define M_IO_RDY_ACTIVE _SB_MAKEMASK1(S_IO_RDY_ACTIVE)
48 #define M_IO_ENA_RDY _SB_MAKEMASK1(S_IO_ENA_RDY)
62 #define M_IO_PARITY_ENA _SB_MAKEMASK1(S_IO_PARITY_ENA)
65 #define M_IO_BURST_EN _SB_MAKEMASK1(S_IO_BURST_EN)
68 #define M_IO_PARITY_ODD _SB_MAKEMASK1(S_IO_PARITY_ODD)
70 #define M_IO_NONMUX _SB_MAKEMASK1(S_IO_NONMUX)
109 #define M_IO_EARLY_CS _SB_MAKEMASK1(3)
145 #define M_IO_RDY_SYNC _SB_MAKEMASK1(3)
173 #define M_IO_CS0_ERR_INT _SB_MAKEMASK1(0)
174 #define M_IO_CS1_ERR_INT _SB_MAKEMASK1(1)
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Dsb1250_scd.h172 #define M_SYS_LDT_PLL_BYP _SB_MAKEMASK1(3)
173 #define M_SYS_PCI_SYNC_TEST_MODE _SB_MAKEMASK1(4)
174 #define M_SYS_IOB0_DIV _SB_MAKEMASK1(5)
175 #define M_SYS_IOB1_DIV _SB_MAKEMASK1(6)
182 #define M_SYS_SER0_ENABLE _SB_MAKEMASK1(12)
183 #define M_SYS_SER0_RSTB_EN _SB_MAKEMASK1(13)
184 #define M_SYS_SER1_ENABLE _SB_MAKEMASK1(14)
185 #define M_SYS_SER1_RSTB_EN _SB_MAKEMASK1(15)
186 #define M_SYS_PCMCIA_ENABLE _SB_MAKEMASK1(16)
197 #define M_SYS_PCI_HOST _SB_MAKEMASK1(19)
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Dsb1250_mac.h52 #define M_MAC_RESERVED0 _SB_MAKEMASK1(0)
53 #define M_MAC_TX_HOLD_SOP_EN _SB_MAKEMASK1(1)
54 #define M_MAC_RETRY_EN _SB_MAKEMASK1(2)
55 #define M_MAC_RET_DRPREQ_EN _SB_MAKEMASK1(3)
56 #define M_MAC_RET_UFL_EN _SB_MAKEMASK1(4)
57 #define M_MAC_BURST_EN _SB_MAKEMASK1(5)
83 #define M_MAC_AP_STAT_EN _SB_MAKEMASK1(17)
84 #define M_MAC_RESERVED2 _SB_MAKEMASK1(18)
85 #define M_MAC_DRP_ERRPKT_EN _SB_MAKEMASK1(19)
86 #define M_MAC_DRP_FCSERRPKT_EN _SB_MAKEMASK1(20)
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Dsb1250_l2c.h67 #define M_L2C_TAG_DIRTY _SB_MAKEMASK1(48)
68 #define M_L2C_TAG_VALID _SB_MAKEMASK1(49)
97 #define M_L2C_MGMT_DIRTY _SB_MAKEMASK1(19)
98 #define M_L2C_MGMT_VALID _SB_MAKEMASK1(20)
115 #define M_L2C_MISC_ECC_CLEANUP_DIS _SB_MAKEMASK1(9)
116 #define M_L2C_MISC_MC_PRIO_LOW _SB_MAKEMASK1(8)
117 #define M_L2C_MISC_SOFT_DISABLE_T _SB_MAKEMASK1(7)
118 #define M_L2C_MISC_SOFT_DISABLE_B _SB_MAKEMASK1(6)
119 #define M_L2C_MISC_SOFT_DISABLE_R _SB_MAKEMASK1(5)
120 #define M_L2C_MISC_SOFT_DISABLE_L _SB_MAKEMASK1(4)
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Dsb1250_smbus.h59 #define M_SMB_ERR_INTR _SB_MAKEMASK1(0)
60 #define M_SMB_FINISH_INTR _SB_MAKEMASK1(1)
61 #define M_SMB_DATA_OUT _SB_MAKEMASK1(4)
62 #define M_SMB_DATA_DIR _SB_MAKEMASK1(5)
64 #define M_SMB_CLK_OUT _SB_MAKEMASK1(6)
65 #define M_SMB_DIRECT_ENABLE _SB_MAKEMASK1(7)
71 #define M_SMB_BUSY _SB_MAKEMASK1(0)
72 #define M_SMB_ERROR _SB_MAKEMASK1(1)
73 #define M_SMB_ERROR_TYPE _SB_MAKEMASK1(2)
74 #define M_SMB_REF _SB_MAKEMASK1(6)
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Dsb1250_mc.h104 #define M_MC_IOB1HIGHPRIORITY _SB_MAKEMASK1(52)
125 #define M_MC_ECC_DISABLE _SB_MAKEMASK1(60)
126 #define M_MC_BERR_DISABLE _SB_MAKEMASK1(61)
127 #define M_MC_FORCE_SEQ _SB_MAKEMASK1(62)
128 #define M_MC_DEBUG _SB_MAKEMASK1(63)
195 #define M_MC_REF_DISABLE _SB_MAKEMASK1(30)
198 #define M_MC_DLL_BYPASS _SB_MAKEMASK1(31)
262 #define M_MC_CS0 _SB_MAKEMASK1(4)
263 #define M_MC_CS1 _SB_MAKEMASK1(5)
264 #define M_MC_CS2 _SB_MAKEMASK1(6)
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Dsb1250_defs.h211 #define _SB_MAKEMASK1(n) (_SB_MAKE64(1) << _SB_MAKE64(n)) macro