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Searched refs:TX4927_WR (Results 1 – 3 of 3) sorted by relevance

/linux-2.4.37.9/arch/mips/tx4927/common/
Dtx4927_irq.c483 TX4927_WR(pic_reg, val); in tx4927_irq_pic_modify()
507 TX4927_WR(0xff1ff640, 0x6); /* irq level mask -- only accept hightest */ in tx4927_irq_pic_init()
508 TX4927_WR(0xff1ff600, TX4927_RD(0xff1ff600) | 0x1); /* irq enable */ in tx4927_irq_pic_init()
/linux-2.4.37.9/arch/mips/tx4927/toshiba_rbtx4927/
Dtoshiba_rbtx4927_setup.c980 TX4927_WR(0xff1ff604, 0x00000400); /* irq trigger */ in toshiba_rbtx4927_setup()
981 TX4927_WR(0xff1ff608, 0x00000000); /* irq trigger */ in toshiba_rbtx4927_setup()
986 TX4927_WR(0xff1ff314, 0x00000000); /* h/w flow control off */ in toshiba_rbtx4927_setup()
987 TX4927_WR(0xff1ff414, 0x00000000); /* h/w flow control off */ in toshiba_rbtx4927_setup()
/linux-2.4.37.9/include/asm-mips/tx4927/
Dtx4927.h494 #define TX4927_WR( reg, val ) TX4927_WR32( reg, val ) macro