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Searched refs:SXFER_REG (Results 1 – 8 of 8) sorted by relevance

/linux-2.4.37.9/drivers/scsi/
D53c7xx.c2099 (SXFER_REG << 16) | (sxfer << 8); in set_synchronous()
2122 NCR53c7x0_write8(SXFER_REG, sxfer); in set_synchronous()
2548 host->host_no, NCR53c7x0_read8(SXFER_REG), in NCR53c7x0_dstat_sir_intr()
2552 host->host_no, NCR53c7x0_read8(SXFER_REG)); in NCR53c7x0_dstat_sir_intr()
2685 host->host_no, NCR53c7x0_read8(SXFER_REG), in NCR53c7x0_dstat_sir_intr()
2740 unsigned char sxfer = NCR53c7x0_read8 (SXFER_REG), scntl3; in NCR53c7x0_dstat_sir_intr()
2748 NCR53c7x0_write8 (SXFER_REG, sxfer); in NCR53c7x0_dstat_sir_intr()
2759 NCR53c7x0_write8 (SXFER_REG, sxfer); in NCR53c7x0_dstat_sir_intr()
2779 (int) NCR53c7x0_read8(SXFER_REG), in NCR53c7x0_dstat_sir_intr()
2786 (int) NCR53c7x0_read8(SXFER_REG), in NCR53c7x0_dstat_sir_intr()
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D53c700.c414 synchronous = NCR_700_readb(host, SXFER_REG) & 0x0f; in NCR_700_data_residual()
771 NCR_700_writeb(ASYNC_OPERATION, host, SXFER_REG); in NCR_700_chip_setup()
891 host, SXFER_REG); in process_extended_message()
1209 host, SXFER_REG); in process_script_interrupt()
1517 SCp->host, SXFER_REG); in NCR_700_start_command()
Dsim710.c310 NCR_read8(SXFER_REG), NCR_read8(SCID_REG), NCR_read8(SBCL_REG), in ncr_dump()
549 NCR_write8(SXFER_REG, 0); in sim710_soft_reset()
657 synchronous = NCR_read8 (SXFER_REG) & SXFER_MO_MASK; in datapath_residual()
D53c7,8xx.c2355 (SXFER_REG << 16) | (sxfer << 8); in set_synchronous()
2379 NCR53c7x0_write8(SXFER_REG, sxfer); in set_synchronous()
2763 host->host_no, NCR53c7x0_read8(SXFER_REG), in NCR53c8x0_dstat_sir_intr()
2891 host->host_no, NCR53c7x0_read8(SXFER_REG), in NCR53c8x0_dstat_sir_intr()
2946 unsigned char sxfer = NCR53c7x0_read8 (SXFER_REG), in NCR53c8x0_dstat_sir_intr()
2953 NCR53c7x0_write8 (SXFER_REG, sxfer); in NCR53c8x0_dstat_sir_intr()
2970 (int) NCR53c7x0_read8(SXFER_REG), in NCR53c8x0_dstat_sir_intr()
4733 synchronous = NCR53c7x0_read8 (SXFER_REG) & SXFER_MO_MASK;
6018 (int) NCR53c7x0_read8(SXFER_REG),
Dsim710.h145 #define SXFER_REG (0x05^bE) macro
D53c700.h325 #define SXFER_REG 0x05 macro
D53c7,8xx.h178 #define SXFER_REG 0x05 macro
D53c7xx.h156 #define SXFER_REG 0x05 macro