Searched refs:REG1 (Results 1 – 7 of 7) sorted by relevance
155 #define REG1 ( outb( inb( qbase + 0xd ) | 0x80 , qbase + 0xd ), outb( 0xb4 | QL_INT_ACTIVE_HIGH , q… macro186 REG1; in ql_zap()312 REG1; in ql_icmd()385 REG1; in ql_pcmd()580 REG1; in qlogicfas_detect()603 REG1; in qlogicfas_detect()616 REG1; in qlogicfas_detect()
91 #define REG1 (outb(C5_IMG, CONFIG5)) macro360 REG1; in NCR53c406a_pio_read()415 REG1; in NCR53c406a_pio_write()806 REG1; in NCR53c406a_intr()1018 REG1; in chip_init()
421 #define REG1 0x01 macro497 #define eepro_en_intline(ioaddr) outb(inb(ioaddr + REG1) | INT_ENABLE,\498 ioaddr + REG1)501 #define eepro_dis_intline(ioaddr) outb(inb(ioaddr + REG1) & 0x7f, \502 ioaddr + REG1);998 temp_reg = inb(ioaddr + REG1); /* Setup Transmit Chaining */ in eepro_open()1000 | RCV_Discard_BadFrame, ioaddr + REG1); in eepro_open()1249 temp_reg = inb(ioaddr + REG1); in eepro_close()1250 outb(temp_reg & 0x7f, ioaddr + REG1); in eepro_close()
14 #define REG1 0x04UL /* Mode and Interrupt */ macro
512 x = sbus_readl(dbri->regs + REG1); in dbri_intr()
3262 #define REG1 0xa2 macro
3462 REG1 {