Home
last modified time | relevance | path

Searched refs:MII_SR (Results 1 – 4 of 4) sorted by relevance

/linux-2.4.37.9/drivers/net/
Dde4x5.h454 #define MII_SR 0x01 /* MII Management Status Register */ macro
960 sr = mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII);\
Dgmac.h659 #define MII_SR 0x01 /* MII Management Status Register */ macro
Dgmac.c161 tmp |= (MII_SR << GM_MIF_CFGPR_SHIFT); in mii_poll_start()
217 phy_status = mii_read(gm, gm->phy_addr, MII_SR); in mii_interrupt()
603 mii_status = mii_read(gm, i, MII_SR); in mii_lookup_and_reset()
Dde4x5.c2860 if ((sr=test_mii_reg(dev, MII_SR, MII_SR_ASSC, TRUE, 2000)) < 0) { in dc21140m_autoconf()
3043 if ((sr=test_mii_reg(dev, MII_SR, MII_SR_ASSC, TRUE, 2000)) < 0) { in dc2114x_autoconf()
3536 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); in is_100_up()
3537 return (mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII) & MII_SR_LKS); in is_100_up()
3557 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); in is_10_up()
3558 return (mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII) & MII_SR_LKS); in is_10_up()
3579 return (mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII)); in is_anc_capable()
5456 printk("MII SR: %x\n",mii_rd(MII_SR,lp->phy[k].addr,DE4X5_MII)); in de4x5_dbg_mii()