| /glibc-2.36/sysdeps/ia64/ |
| D | memset.S | 73 #define store st8 macro
76 #define store stf8 macro
175 store [ptr9] = myval, 128 // Do stores one cache line apart
185 store [ptr2] = myval, 8
186 store [ptr0] = myval, 8
189 store [ptr2] = myval, 24
190 store [ptr0] = myval, 24
193 store [ptr2] = myval, 8
194 store [ptr0] = myval, 8
197 store [ptr2] = myval, 24
[all …]
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| D | memcpy.S | 79 #define store stf8 macro
91 #define store st8 macro
254 (p_xtr) store [dest] = tempreg, 8 // copy the "extra" word
276 (p[MEMLAT]) store [dest] = the_r[MEMLAT], 8
277 (p[MEMLAT]) store [adest] = the_s[MEMLAT], 8
285 (p[MEMLAT]) store [dest] = the_q[MEMLAT], 24
286 (p[MEMLAT]) store [adest] = the_t[MEMLAT], 24
296 (p[MEMLAT]) store [dest] = the_r[MEMLAT], 8
297 (p[MEMLAT]) store [adest] = the_q[MEMLAT], 8
303 (p[MEMLAT]) store [dest] = the_s[MEMLAT], 24
[all …]
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| /glibc-2.36/sysdeps/alpha/alphaev6/ |
| D | memcpy.S | 82 stq $1, 0($16) # L : store
160 stq $1, 0($16) # L : store 8
179 stb $1, 0($16) # L : store a byte
202 stb $1, 0($4) # L : store it
218 bis $3, $1, $1 # E : merged bytes to store
222 stq $1, 0($4) # L : store 8 (aligned)
242 stb $1, 0($4) # L : store
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| /glibc-2.36/sysdeps/alpha/ |
| D | memset.S | 54 blbc t3, 0f # skip single store if count even
56 stq_u a1, 0(a0) # e0 : store one word
61 0: stq_u a1, 0(a0) # e0 : store two words
88 beq a2, $done # .. e1 : early exit for zero-length store
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| D | mul_1.S | 1 # Alpha 21064 __mpn_mul_1 -- Multiply a limb vector with a limb and store
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| D | add_n.S | 2 # store sum in a third limb vector.
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| D | sub_n.S | 2 # store difference in a third limb vector.
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| /glibc-2.36/sysdeps/arm/ |
| D | memset.S | 45 stmiacs r3!, {r1, ip} @ store up to 32 bytes per loop iteration
56 subs r2, r2, #1 @ store up to 4 bytes per loop iteration
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| /glibc-2.36/sysdeps/hppa/ |
| D | sub_n.S | 2 ;! store difference in a third limb vector.
30 ;! out that the data cache contention after a store makes such
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| D | add_n.S | 1 ;! HP-PA __mpn_add_n -- Add two limb vectors of the same length > 0 and store
30 ;! out that the data cache contention after a store makes such
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| /glibc-2.36/sysdeps/mach/hurd/ |
| D | ioctl.c | 296 void *store, void **update) in __ioctl()
307 memcpy (store, t, len); in __ioctl()
313 memcpy (store, p, len); in __ioctl()
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| /glibc-2.36/sysdeps/hppa/hppa1.1/ |
| D | mul_1.S | 1 ;! HP-PA-1.1 __mpn_mul_1 -- Multiply a limb vector with a limb and store
30 ;! not become faster due to data cache contention after a store. On the
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| /glibc-2.36/sysdeps/s390/s390-32/ |
| D | dl-trampoline.h | 212 vstm %v24,%v31,FRAME_OFF+V24_OFF(%r15) # store call-clobbered
272 stm %r2,%r3,CFA_OFF+RET_R2_OFF(%r12) # store return vals r2, r3, f0
277 vst %v24,CFA_OFF+RET_V24_OFF(%r12) # store return value v24
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| D | strncpy-z900.S | 50 st %r0,0(%r2,%r3) # store all four to dest.
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| /glibc-2.36/sysdeps/s390/s390-64/ |
| D | dl-trampoline.h | 218 vstm %v24,%v31,FRAME_OFF+V24_OFF(%r15) # store call-clobbered
276 stg %r2,CFA_OFF+RET_R2_OFF(%r12) # store return values r2, f0
281 vst %v24,CFA_OFF+RET_V24_OFF(%r12) # store return value v24
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| D | start.S | 80 stmg %r14,%r15,160(%r15) # store rtld_fini/stack_end to parameter area
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| D | strncpy-z900.S | 57 stg %r0,0(%r2,%r3) # store all eight to dest.
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| /glibc-2.36/sysdeps/sparc/sparc64/ |
| D | add_n.S | 49 stx %g1,[%o0+%o5] ! store result
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| D | sub_n.S | 46 stx %g1,[%o0+%o5] ! store result
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| /glibc-2.36/sysdeps/arm/armv6/ |
| D | strcpy.S | 133 subeq r0, r0, #1 @ stpcpy: undo post-inc from store
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| /glibc-2.36/sysdeps/sparc/sparc64/multiarch/ |
| D | add_n-vis3.S | 2 ! store sum in a third limb vector.
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| D | sub_n-vis3.S | 2 ! and store difference in a third limb vector.
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| D | mul_1-vis3.S | 2 ! limb and store the product in a second limb vector.
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| /glibc-2.36/sysdeps/sparc/sparc32/sparcv9/ |
| D | mul_1.S | 2 ! limb and store the product in a second limb vector.
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| /glibc-2.36/sysdeps/powerpc/powerpc32/ |
| D | dl-trampoline.S | 150 # XXX TODO: store vmx registers
|