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Searched refs:XHCI_PORT_PORTSC (Results 1 – 3 of 3) sorted by relevance

/DragonOS-0.1.3/kernel/src/driver/usb/xhci/
Dinternal.h67 …((xhci_read_op_reg32((__id), XHCI_PORT_REGISTER_OFFSET(__port_id) + XHCI_PORT_PORTSC) >> 10) & 0xf)
Dxhci.c788 if ((xhci_read_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC) & (1 << 9)) == 0) in xhci_reset_port()
792 xhci_write_cap_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9)); in xhci_reset_port()
796 if ((xhci_read_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC) & (1 << 9)) == 0) in xhci_reset_port()
805 …xhci_write_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9) | XHCI_PORTUSB_CHANGE_BITS… in xhci_reset_port()
810 xhci_write_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9) | (1U << 31)); in xhci_reset_port()
812 xhci_write_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9) | (1 << 4)); in xhci_reset_port()
821 uint32_t val = xhci_read_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC); in xhci_reset_port()
842 uint32_t val = xhci_read_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC); in xhci_reset_port()
854 …xhci_write_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9) | XHCI_PORTUSB_CHANGE_BITS… in xhci_reset_port()
Dxhci.h354 #define XHCI_PORT_PORTSC 0x00 // Port status and control macro