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Searched defs:val (Results 1 – 25 of 4851) sorted by relevance

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/linux-6.1.9/arch/arm/include/asm/hardware/
Dcp14.h12 #define dbg_write(val, reg) WCP14_##reg(val) argument
14 #define etm_write(val, reg) WCP14_##reg(val) argument
24 #define MCR14(val, op1, crn, crm, op2) \ argument
152 #define WCP14_DBGDTRTXint(val) MCR14(val, 0, c0, c5, 0) argument
153 #define WCP14_DBGWFAR(val) MCR14(val, 0, c0, c6, 0) argument
154 #define WCP14_DBGVCR(val) MCR14(val, 0, c0, c7, 0) argument
155 #define WCP14_DBGECR(val) MCR14(val, 0, c0, c9, 0) argument
156 #define WCP14_DBGDSCCR(val) MCR14(val, 0, c0, c10, 0) argument
157 #define WCP14_DBGDSMCR(val) MCR14(val, 0, c0, c11, 0) argument
158 #define WCP14_DBGDTRRXext(val) MCR14(val, 0, c0, c0, 2) argument
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/linux-6.1.9/drivers/net/wireless/realtek/rtw89/
Dfw.h26 #define RTW89_SET_H2CREG_HDR_FUNC(info, val) \ argument
28 #define RTW89_SET_H2CREG_HDR_LEN(info, val) \ argument
246 static inline void RTW89_SET_FWCMD_RA_IS_DIS(void *cmd, u32 val) in RTW89_SET_FWCMD_RA_IS_DIS()
251 static inline void RTW89_SET_FWCMD_RA_MODE(void *cmd, u32 val) in RTW89_SET_FWCMD_RA_MODE()
256 static inline void RTW89_SET_FWCMD_RA_BW_CAP(void *cmd, u32 val) in RTW89_SET_FWCMD_RA_BW_CAP()
261 static inline void RTW89_SET_FWCMD_RA_MACID(void *cmd, u32 val) in RTW89_SET_FWCMD_RA_MACID()
266 static inline void RTW89_SET_FWCMD_RA_DCM(void *cmd, u32 val) in RTW89_SET_FWCMD_RA_DCM()
271 static inline void RTW89_SET_FWCMD_RA_ER(void *cmd, u32 val) in RTW89_SET_FWCMD_RA_ER()
276 static inline void RTW89_SET_FWCMD_RA_INIT_RATE_LV(void *cmd, u32 val) in RTW89_SET_FWCMD_RA_INIT_RATE_LV()
281 static inline void RTW89_SET_FWCMD_RA_UPD_ALL(void *cmd, u32 val) in RTW89_SET_FWCMD_RA_UPD_ALL()
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/linux-6.1.9/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Dtypes.h133 #define CONF_HAS(config, val) ((config) & (1 << (val))) argument
138 #define CONF_IS(config, val) ((config) == (1 << (val))) argument
139 #define CONF_GE(config, val) ((config) & (0-(1 << (val)))) argument
140 #define CONF_GT(config, val) ((config) & (0-2*(1 << (val)))) argument
141 #define CONF_LT(config, val) ((config) & ((1 << (val))-1)) argument
142 #define CONF_LE(config, val) ((config) & (2*(1 << (val))-1)) argument
146 #define NCONF_HAS(val) CONF_HAS(NCONF, val) argument
148 #define NCONF_IS(val) CONF_IS(NCONF, val) argument
149 #define NCONF_GE(val) CONF_GE(NCONF, val) argument
150 #define NCONF_GT(val) CONF_GT(NCONF, val) argument
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/linux-6.1.9/arch/s390/include/asm/
Dpercpu.h27 #define arch_this_cpu_to_op_simple(pcp, val, op) \ argument
44 #define this_cpu_add_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
45 #define this_cpu_add_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
46 #define this_cpu_add_return_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
47 #define this_cpu_add_return_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
48 #define this_cpu_and_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, &) argument
49 #define this_cpu_and_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, &) argument
50 #define this_cpu_or_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, |) argument
51 #define this_cpu_or_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, |) argument
55 #define this_cpu_add_4(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
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/linux-6.1.9/drivers/gpu/drm/msm/adreno/
Dadreno_pm4.xml.h488 static inline uint32_t CP_LOAD_STATE_0_DST_OFF(uint32_t val) in CP_LOAD_STATE_0_DST_OFF()
494 static inline uint32_t CP_LOAD_STATE_0_STATE_SRC(enum adreno_state_src val) in CP_LOAD_STATE_0_STATE_SRC()
500 static inline uint32_t CP_LOAD_STATE_0_STATE_BLOCK(enum adreno_state_block val) in CP_LOAD_STATE_0_STATE_BLOCK()
506 static inline uint32_t CP_LOAD_STATE_0_NUM_UNIT(uint32_t val) in CP_LOAD_STATE_0_NUM_UNIT()
514 static inline uint32_t CP_LOAD_STATE_1_STATE_TYPE(enum adreno_state_type val) in CP_LOAD_STATE_1_STATE_TYPE()
520 static inline uint32_t CP_LOAD_STATE_1_EXT_SRC_ADDR(uint32_t val) in CP_LOAD_STATE_1_EXT_SRC_ADDR()
528 static inline uint32_t CP_LOAD_STATE4_0_DST_OFF(uint32_t val) in CP_LOAD_STATE4_0_DST_OFF()
534 static inline uint32_t CP_LOAD_STATE4_0_STATE_SRC(enum a4xx_state_src val) in CP_LOAD_STATE4_0_STATE_SRC()
540 static inline uint32_t CP_LOAD_STATE4_0_STATE_BLOCK(enum a4xx_state_block val) in CP_LOAD_STATE4_0_STATE_BLOCK()
546 static inline uint32_t CP_LOAD_STATE4_0_NUM_UNIT(uint32_t val) in CP_LOAD_STATE4_0_NUM_UNIT()
[all …]
Da6xx.xml.h1079 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_1_RB_LO(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_1_RB_LO()
1085 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_1_RB_HI(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_1_RB_HI()
1091 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_1_IB1_START(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_1_IB1_START()
1097 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_1_IB2_START(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_1_IB2_START()
1105 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_2_SDS_START(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_2_SDS_START()
1111 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_2_ROQ_SIZE(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_2_ROQ_SIZE()
1135 static inline uint32_t A6XX_CP_PROTECT_REG_BASE_ADDR(uint32_t val) in A6XX_CP_PROTECT_REG_BASE_ADDR()
1141 static inline uint32_t A6XX_CP_PROTECT_REG_MASK_LEN(uint32_t val) in A6XX_CP_PROTECT_REG_MASK_LEN()
1230 static inline uint32_t A6XX_CP_CSQ_IB1_STAT_REM(uint32_t val) in A6XX_CP_CSQ_IB1_STAT_REM()
1238 static inline uint32_t A6XX_CP_CSQ_IB2_STAT_REM(uint32_t val) in A6XX_CP_CSQ_IB2_STAT_REM()
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Da3xx.xml.h947 static inline uint32_t A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES(uint32_t val) in A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES()
955 static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ(uint32_t val) in A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ()
961 static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_VERT(uint32_t val) in A3XX_GRAS_CL_GB_CLIP_ADJ_VERT()
969 static inline uint32_t A3XX_GRAS_CL_VPORT_XOFFSET(float val) in A3XX_GRAS_CL_VPORT_XOFFSET()
977 static inline uint32_t A3XX_GRAS_CL_VPORT_XSCALE(float val) in A3XX_GRAS_CL_VPORT_XSCALE()
985 static inline uint32_t A3XX_GRAS_CL_VPORT_YOFFSET(float val) in A3XX_GRAS_CL_VPORT_YOFFSET()
993 static inline uint32_t A3XX_GRAS_CL_VPORT_YSCALE(float val) in A3XX_GRAS_CL_VPORT_YSCALE()
1001 static inline uint32_t A3XX_GRAS_CL_VPORT_ZOFFSET(float val) in A3XX_GRAS_CL_VPORT_ZOFFSET()
1009 static inline uint32_t A3XX_GRAS_CL_VPORT_ZSCALE(float val) in A3XX_GRAS_CL_VPORT_ZSCALE()
1017 static inline uint32_t A3XX_GRAS_SU_POINT_MINMAX_MIN(float val) in A3XX_GRAS_SU_POINT_MINMAX_MIN()
[all …]
Da4xx.xml.h845 static inline uint32_t A4XX_CGC_HLSQ_EARLY_CYC(uint32_t val) in A4XX_CGC_HLSQ_EARLY_CYC()
902 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(uint32_t val) in A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH()
908 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(uint32_t val) in A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT()
924 static inline uint32_t A4XX_RB_MODE_CONTROL_WIDTH(uint32_t val) in A4XX_RB_MODE_CONTROL_WIDTH()
930 static inline uint32_t A4XX_RB_MODE_CONTROL_HEIGHT(uint32_t val) in A4XX_RB_MODE_CONTROL_HEIGHT()
944 static inline uint32_t A4XX_RB_MSAA_CONTROL_SAMPLES(uint32_t val) in A4XX_RB_MSAA_CONTROL_SAMPLES()
952 static inline uint32_t A4XX_RB_RENDER_CONTROL2_COORD_MASK(uint32_t val) in A4XX_RB_RENDER_CONTROL2_COORD_MASK()
961 static inline uint32_t A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES(uint32_t val) in A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES()
980 static inline uint32_t A4XX_RB_MRT_CONTROL_ROP_CODE(enum a3xx_rop_code val) in A4XX_RB_MRT_CONTROL_ROP_CODE()
986 static inline uint32_t A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val) in A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE()
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/linux-6.1.9/arch/loongarch/include/asm/
Dpercpu.h99 static inline void __percpu_write(void *ptr, unsigned long val, int size) in __percpu_write()
131 static inline unsigned long __percpu_xchg(void *ptr, unsigned long val, in __percpu_xchg()
169 #define _percpu_write(pcp, val) \ argument
174 #define _pcp_protect(operation, pcp, val) \ argument
184 #define _percpu_add(pcp, val) \ argument
187 #define _percpu_add_return(pcp, val) _percpu_add(pcp, val) argument
189 #define _percpu_and(pcp, val) \ argument
192 #define _percpu_or(pcp, val) \ argument
195 #define _percpu_xchg(pcp, val) ((typeof(pcp)) \ argument
198 #define this_cpu_add_4(pcp, val) _percpu_add(pcp, val) argument
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/linux-6.1.9/drivers/gpu/drm/panel/
Dpanel-abt-y030xx067a.c22 #define REG00_VBRT_CTRL(val) (val) argument
24 #define REG01_COM_DC(val) (val) argument
26 #define REG02_DA_CONTRAST(val) (val) argument
27 #define REG02_VESA_SEL(val) ((val) << 5) argument
30 #define REG03_VPOSITION(val) (val) argument
35 #define REG04_HPOSITION1(val) (val) argument
40 #define REG05_SLBRCHARGE(val) ((val) << 3) argument
41 #define REG05_PRECHARGE_LEVEL(val) ((val) << 6) argument
48 #define REG06_GAMMA_SEL(val) ((val) << 5) argument
57 #define REG07_AMPTST(val) ((val) << 6) argument
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/linux-6.1.9/include/asm-generic/
Dpercpu.h70 #define raw_cpu_generic_to_op(pcp, val, op) \ argument
75 #define raw_cpu_generic_add_return(pcp, val) \ argument
144 #define this_cpu_generic_to_op(pcp, val, op) \ argument
153 #define this_cpu_generic_add_return(pcp, val) \ argument
208 #define raw_cpu_write_1(pcp, val) raw_cpu_generic_to_op(pcp, val, =) argument
211 #define raw_cpu_write_2(pcp, val) raw_cpu_generic_to_op(pcp, val, =) argument
214 #define raw_cpu_write_4(pcp, val) raw_cpu_generic_to_op(pcp, val, =) argument
217 #define raw_cpu_write_8(pcp, val) raw_cpu_generic_to_op(pcp, val, =) argument
221 #define raw_cpu_add_1(pcp, val) raw_cpu_generic_to_op(pcp, val, +=) argument
224 #define raw_cpu_add_2(pcp, val) raw_cpu_generic_to_op(pcp, val, +=) argument
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/linux-6.1.9/sound/synth/emux/
Demux_nrpn.c41 int type, int val, int mode) in send_converted_effect()
128 static int fx_delay(int val) in fx_delay()
133 static int fx_attack(int val) in fx_attack()
138 static int fx_hold(int val) in fx_hold()
143 static int fx_decay(int val) in fx_decay()
148 static int fx_the_value(int val) in fx_the_value()
153 static int fx_twice_value(int val) in fx_twice_value()
158 static int fx_conv_pitch(int val) in fx_conv_pitch()
163 static int fx_conv_Q(int val) in fx_conv_Q()
209 static int gs_cutoff(int val) in gs_cutoff()
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/linux-6.1.9/arch/alpha/lib/
Dfpreg.c12 #define STT(reg,val) asm volatile ("ftoit $f"#reg",%0" : "=r"(val)); argument
14 #define STT(reg,val) asm volatile ("stt $f"#reg",%0" : "=m"(val)); argument
20 unsigned long val; in alpha_read_fp_reg() local
62 #define LDT(reg,val) asm volatile ("itoft %0,$f"#reg : : "r"(val)); argument
64 #define LDT(reg,val) asm volatile ("ldt $f"#reg",%0" : : "m"(val)); argument
68 alpha_write_fp_reg (unsigned long reg, unsigned long val) in alpha_write_fp_reg()
108 #define STS(reg,val) asm volatile ("ftois $f"#reg",%0" : "=r"(val)); argument
110 #define STS(reg,val) asm volatile ("sts $f"#reg",%0" : "=m"(val)); argument
116 unsigned long val; in alpha_read_fp_reg_s() local
158 #define LDS(reg,val) asm volatile ("itofs %0,$f"#reg : : "r"(val)); argument
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/linux-6.1.9/include/sound/
Demu8000_reg.h108 #define EMU8000_CPF_WRITE(emu, chan, val) \ argument
110 #define EMU8000_PTRX_WRITE(emu, chan, val) \ argument
112 #define EMU8000_CVCF_WRITE(emu, chan, val) \ argument
114 #define EMU8000_VTFT_WRITE(emu, chan, val) \ argument
116 #define EMU8000_PSST_WRITE(emu, chan, val) \ argument
118 #define EMU8000_CSL_WRITE(emu, chan, val) \ argument
120 #define EMU8000_CCCA_WRITE(emu, chan, val) \ argument
122 #define EMU8000_HWCF4_WRITE(emu, val) \ argument
124 #define EMU8000_HWCF5_WRITE(emu, val) \ argument
126 #define EMU8000_HWCF6_WRITE(emu, val) \ argument
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/linux-6.1.9/arch/mips/include/asm/
Dmipsregs.h1383 #define write_r10k_perf_cntr(counter,val) \ argument
1402 #define write_r10k_perf_cntl(counter,val) \ argument
1509 #define __write_ulong_c0_register(reg, sel, val) \ argument
1568 #define __write_64bit_c0_split(source, sel, val) \ argument
1655 #define write_c0_index(val) __write_32bit_c0_register($0, 0, val) argument
1658 #define write_c0_random(val) __write_32bit_c0_register($1, 0, val) argument
1661 #define write_c0_entrylo0(val) __write_ulong_c0_register($2, 0, val) argument
1664 #define writex_c0_entrylo0(val) __writex_32bit_c0_register($2, 0, val) argument
1667 #define write_c0_entrylo1(val) __write_ulong_c0_register($3, 0, val) argument
1670 #define writex_c0_entrylo1(val) __writex_32bit_c0_register($3, 0, val) argument
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/linux-6.1.9/drivers/gpu/drm/msm/dsi/
Ddsi.xml.h146 static inline uint32_t DSI_6G_HW_VERSION_MAJOR(uint32_t val) in DSI_6G_HW_VERSION_MAJOR()
152 static inline uint32_t DSI_6G_HW_VERSION_MINOR(uint32_t val) in DSI_6G_HW_VERSION_MINOR()
158 static inline uint32_t DSI_6G_HW_VERSION_STEP(uint32_t val) in DSI_6G_HW_VERSION_STEP()
213 static inline uint32_t DSI_VID_CFG0_VIRT_CHANNEL(uint32_t val) in DSI_VID_CFG0_VIRT_CHANNEL()
219 static inline uint32_t DSI_VID_CFG0_DST_FORMAT(enum dsi_vid_dst_format val) in DSI_VID_CFG0_DST_FORMAT()
225 static inline uint32_t DSI_VID_CFG0_TRAFFIC_MODE(enum dsi_traffic_mode val) in DSI_VID_CFG0_TRAFFIC_MODE()
242 static inline uint32_t DSI_VID_CFG1_RGB_SWAP(enum dsi_rgb_swap val) in DSI_VID_CFG1_RGB_SWAP()
250 static inline uint32_t DSI_ACTIVE_H_START(uint32_t val) in DSI_ACTIVE_H_START()
256 static inline uint32_t DSI_ACTIVE_H_END(uint32_t val) in DSI_ACTIVE_H_END()
264 static inline uint32_t DSI_ACTIVE_V_START(uint32_t val) in DSI_ACTIVE_V_START()
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/linux-6.1.9/arch/arm64/include/asm/
Dpercpu.h180 #define this_cpu_write_1(pcp, val) \ argument
182 #define this_cpu_write_2(pcp, val) \ argument
184 #define this_cpu_write_4(pcp, val) \ argument
186 #define this_cpu_write_8(pcp, val) \ argument
189 #define this_cpu_add_1(pcp, val) \ argument
191 #define this_cpu_add_2(pcp, val) \ argument
193 #define this_cpu_add_4(pcp, val) \ argument
195 #define this_cpu_add_8(pcp, val) \ argument
198 #define this_cpu_add_return_1(pcp, val) \ argument
200 #define this_cpu_add_return_2(pcp, val) \ argument
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/linux-6.1.9/arch/alpha/include/uapi/asm/
Dcompiler.h14 # define __kernel_insbl(val, shift) __builtin_alpha_insbl(val, shift) argument
15 # define __kernel_inswl(val, shift) __builtin_alpha_inswl(val, shift) argument
16 # define __kernel_insql(val, shift) __builtin_alpha_insql(val, shift) argument
17 # define __kernel_inslh(val, shift) __builtin_alpha_inslh(val, shift) argument
18 # define __kernel_extbl(val, shift) __builtin_alpha_extbl(val, shift) argument
19 # define __kernel_extwl(val, shift) __builtin_alpha_extwl(val, shift) argument
22 # define __kernel_insbl(val, shift) \ argument
26 # define __kernel_inswl(val, shift) \ argument
30 # define __kernel_insql(val, shift) \ argument
34 # define __kernel_inslh(val, shift) \ argument
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/linux-6.1.9/include/linux/
Diopoll.h36 #define read_poll_timeout(op, val, cond, sleep_us, timeout_us, \ argument
79 #define read_poll_timeout_atomic(op, val, cond, delay_us, timeout_us, \ argument
120 #define readx_poll_timeout(op, addr, val, cond, sleep_us, timeout_us) \ argument
140 #define readx_poll_timeout_atomic(op, addr, val, cond, delay_us, timeout_us) \ argument
143 #define readb_poll_timeout(addr, val, cond, delay_us, timeout_us) \ argument
146 #define readb_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ argument
149 #define readw_poll_timeout(addr, val, cond, delay_us, timeout_us) \ argument
152 #define readw_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ argument
155 #define readl_poll_timeout(addr, val, cond, delay_us, timeout_us) \ argument
158 #define readl_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ argument
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/linux-6.1.9/drivers/gpu/drm/msm/disp/mdp5/
Dmdp5.xml.h191 static inline uint32_t MDSS_HW_VERSION_STEP(uint32_t val) in MDSS_HW_VERSION_STEP()
197 static inline uint32_t MDSS_HW_VERSION_MINOR(uint32_t val) in MDSS_HW_VERSION_MINOR()
203 static inline uint32_t MDSS_HW_VERSION_MAJOR(uint32_t val) in MDSS_HW_VERSION_MAJOR()
218 static inline uint32_t MDP5_HW_VERSION_STEP(uint32_t val) in MDP5_HW_VERSION_STEP()
224 static inline uint32_t MDP5_HW_VERSION_MINOR(uint32_t val) in MDP5_HW_VERSION_MINOR()
230 static inline uint32_t MDP5_HW_VERSION_MAJOR(uint32_t val) in MDP5_HW_VERSION_MAJOR()
238 static inline uint32_t MDP5_DISP_INTF_SEL_INTF0(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF0()
244 static inline uint32_t MDP5_DISP_INTF_SEL_INTF1(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF1()
250 static inline uint32_t MDP5_DISP_INTF_SEL_INTF2(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF2()
256 static inline uint32_t MDP5_DISP_INTF_SEL_INTF3(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF3()
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/linux-6.1.9/drivers/gpu/drm/i915/
Dintel_dram.c51 static int skl_get_dimm_size(u16 val) in skl_get_dimm_size()
56 static int skl_get_dimm_width(u16 val) in skl_get_dimm_width()
73 static int skl_get_dimm_ranks(u16 val) in skl_get_dimm_ranks()
84 static int icl_get_dimm_size(u16 val) in icl_get_dimm_size()
89 static int icl_get_dimm_width(u16 val) in icl_get_dimm_width()
106 static int icl_get_dimm_ranks(u16 val) in icl_get_dimm_ranks()
126 int channel, char dimm_name, u16 val) in skl_dram_get_dimm_info()
147 int channel, u32 val) in skl_dram_get_channel_info()
189 u32 val; in skl_dram_get_channels_info() local
227 u32 val; in skl_get_dram_type() local
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Dvlv_sideband.c76 u32 addr, u32 *val) in vlv_sideband_rw()
126 u32 val = 0; in vlv_punit_read() local
134 int vlv_punit_write(struct drm_i915_private *i915, u32 addr, u32 val) in vlv_punit_write()
142 u32 val = 0; in vlv_bunit_read() local
150 void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val) in vlv_bunit_write()
158 u32 val = 0; in vlv_nc_read() local
168 u32 val = 0; in vlv_iosf_sb_read() local
177 u8 port, u32 reg, u32 val) in vlv_iosf_sb_write()
185 u32 val = 0; in vlv_cck_read() local
193 void vlv_cck_write(struct drm_i915_private *i915, u32 reg, u32 val) in vlv_cck_write()
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/linux-6.1.9/drivers/gpu/drm/msm/disp/mdp4/
Dmdp4.xml.h120 static inline uint32_t MDP4_VERSION_MINOR(uint32_t val) in MDP4_VERSION_MINOR()
126 static inline uint32_t MDP4_VERSION_MAJOR(uint32_t val) in MDP4_VERSION_MAJOR()
148 static inline uint32_t MDP4_DISP_INTF_SEL_PRIM(enum mdp4_intf val) in MDP4_DISP_INTF_SEL_PRIM()
154 static inline uint32_t MDP4_DISP_INTF_SEL_SEC(enum mdp4_intf val) in MDP4_DISP_INTF_SEL_SEC()
160 static inline uint32_t MDP4_DISP_INTF_SEL_EXT(enum mdp4_intf val) in MDP4_DISP_INTF_SEL_EXT()
190 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE0(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE0()
197 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE1(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE1()
204 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE2(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE2()
211 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE3(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE3()
218 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE4(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE4()
[all …]
/linux-6.1.9/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4_tc_u32_parse.h41 int (*val)(struct ch_filter_specification *f, __be32 val, __be32 mask); member
46 __be32 val, __be32 mask) in cxgb4_fill_ipv4_tos()
55 __be32 val, __be32 mask) in cxgb4_fill_ipv4_frag()
77 __be32 val, __be32 mask) in cxgb4_fill_ipv4_proto()
86 __be32 val, __be32 mask) in cxgb4_fill_ipv4_src_ip()
95 __be32 val, __be32 mask) in cxgb4_fill_ipv4_dst_ip()
114 __be32 val, __be32 mask) in cxgb4_fill_ipv6_tos()
123 __be32 val, __be32 mask) in cxgb4_fill_ipv6_proto()
132 __be32 val, __be32 mask) in cxgb4_fill_ipv6_src_ip0()
141 __be32 val, __be32 mask) in cxgb4_fill_ipv6_src_ip1()
[all …]
/linux-6.1.9/arch/x86/include/asm/
Dpercpu.h76 #define __pcpu_cast_1(val) ((u8)(((unsigned long) val) & 0xff)) argument
77 #define __pcpu_cast_2(val) ((u16)(((unsigned long) val) & 0xffff)) argument
78 #define __pcpu_cast_4(val) ((u32)(((unsigned long) val) & 0xffffffff)) argument
79 #define __pcpu_cast_8(val) ((u64)(val)) argument
124 #define percpu_add_op(size, qual, var, val) \ argument
232 #define raw_cpu_write_1(pcp, val) percpu_to_op(1, , "mov", (pcp), val) argument
233 #define raw_cpu_write_2(pcp, val) percpu_to_op(2, , "mov", (pcp), val) argument
234 #define raw_cpu_write_4(pcp, val) percpu_to_op(4, , "mov", (pcp), val) argument
235 #define raw_cpu_add_1(pcp, val) percpu_add_op(1, , (pcp), val) argument
236 #define raw_cpu_add_2(pcp, val) percpu_add_op(2, , (pcp), val) argument
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