1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Time operations for IP22 machines. Original code may come from
7  * Ralf Baechle or David S. Miller (sorry guys, i'm really not sure)
8  *
9  * Copyright (C) 2001 by Ladislav Michl
10  */
11 
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/interrupt.h>
15 #include <linux/kernel_stat.h>
16 #include <linux/time.h>
17 
18 #include <asm/cpu.h>
19 #include <asm/mipsregs.h>
20 #include <asm/io.h>
21 #include <asm/irq.h>
22 #include <asm/time.h>
23 #include <asm/ds1286.h>
24 #include <asm/sgialib.h>
25 #include <asm/sgi/ioc.h>
26 #include <asm/sgi/hpc3.h>
27 #include <asm/sgi/ip22.h>
28 
29 /*
30  * note that mktime uses month from 1 to 12 while to_tm
31  * uses 0 to 11.
32  */
indy_rtc_get_time(void)33 static unsigned long indy_rtc_get_time(void)
34 {
35 	unsigned int yrs, mon, day, hrs, min, sec;
36 	unsigned int save_control;
37 
38 	save_control = hpc3c0->rtcregs[RTC_CMD] & 0xff;
39 	hpc3c0->rtcregs[RTC_CMD] = save_control | RTC_TE;
40 
41 	sec = hpc3c0->rtcregs[RTC_SECONDS] & 0xff;
42 	min = hpc3c0->rtcregs[RTC_MINUTES] & 0xff;
43 	hrs = hpc3c0->rtcregs[RTC_HOURS] & 0x3f;
44 	day = hpc3c0->rtcregs[RTC_DATE] & 0xff;
45 	mon = hpc3c0->rtcregs[RTC_MONTH] & 0x1f;
46 	yrs = hpc3c0->rtcregs[RTC_YEAR] & 0xff;
47 
48 	hpc3c0->rtcregs[RTC_CMD] = save_control;
49 
50 	BCD_TO_BIN(sec);
51 	BCD_TO_BIN(min);
52 	BCD_TO_BIN(hrs);
53 	BCD_TO_BIN(day);
54 	BCD_TO_BIN(mon);
55 	BCD_TO_BIN(yrs);
56 
57 	if (yrs < 45)
58 		yrs += 30;
59 	if ((yrs += 40) < 70)
60 		yrs += 100;
61 
62 	return mktime(yrs + 1900, mon, day, hrs, min, sec);
63 }
64 
indy_rtc_set_time(unsigned long tim)65 static int indy_rtc_set_time(unsigned long tim)
66 {
67 	struct rtc_time tm;
68 	unsigned int save_control;
69 
70 	to_tm(tim, &tm);
71 
72 	tm.tm_mon += 1;		/* tm_mon starts at zero */
73 	tm.tm_year -= 1940;
74 	if (tm.tm_year >= 100)
75 		tm.tm_year -= 100;
76 
77 	BIN_TO_BCD(tm.tm_sec);
78 	BIN_TO_BCD(tm.tm_min);
79 	BIN_TO_BCD(tm.tm_hour);
80 	BIN_TO_BCD(tm.tm_mday);
81 	BIN_TO_BCD(tm.tm_mon);
82 	BIN_TO_BCD(tm.tm_year);
83 
84 	save_control = hpc3c0->rtcregs[RTC_CMD] & 0xff;
85 	hpc3c0->rtcregs[RTC_CMD] = save_control | RTC_TE;
86 
87 	hpc3c0->rtcregs[RTC_YEAR] = tm.tm_year;
88 	hpc3c0->rtcregs[RTC_MONTH] = tm.tm_mon;
89 	hpc3c0->rtcregs[RTC_DATE] = tm.tm_mday;
90 	hpc3c0->rtcregs[RTC_HOURS] = tm.tm_hour;
91 	hpc3c0->rtcregs[RTC_MINUTES] = tm.tm_min;
92 	hpc3c0->rtcregs[RTC_SECONDS] = tm.tm_sec;
93 	hpc3c0->rtcregs[RTC_HUNDREDTH_SECOND] = 0;
94 
95 	hpc3c0->rtcregs[RTC_CMD] = save_control;
96 
97 	return 0;
98 }
99 
dosample(void)100 static unsigned long dosample(void)
101 {
102 	u32 ct0, ct1;
103 	volatile u8 msb, lsb;
104 
105 	/* Start the counter. */
106 	sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
107 			 SGINT_TCWORD_MRGEN);
108 	sgint->tcnt2 = SGINT_TCSAMP_COUNTER & 0xff;
109 	sgint->tcnt2 = SGINT_TCSAMP_COUNTER >> 8;
110 
111 	/* Get initial counter invariant */
112 	ct0 = read_c0_count();
113 
114 	/* Latch and spin until top byte of counter2 is zero */
115 	do {
116 		sgint->tcword = SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT;
117 		lsb = sgint->tcnt2;
118 		msb = sgint->tcnt2;
119 		ct1 = read_c0_count();
120 	} while (msb);
121 
122 	/* Stop the counter. */
123 	sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
124 			 SGINT_TCWORD_MSWST);
125 	/*
126 	 * Return the difference, this is how far the r4k counter increments
127 	 * for every 1/HZ seconds. We round off the nearest 1 MHz of master
128 	 * clock (= 1000000 / HZ / 2).
129 	 */
130 	/*return (ct1 - ct0 + (500000/HZ/2)) / (500000/HZ) * (500000/HZ);*/
131 	return (ct1 - ct0) / (500000/HZ) * (500000/HZ);
132 }
133 
134 /*
135  * Here we need to calibrate the cycle counter to at least be close.
136  */
indy_time_init(void)137 void indy_time_init(void)
138 {
139 	unsigned long r4k_ticks[3];
140 	unsigned long r4k_tick;
141 
142 	/*
143 	 * Figure out the r4k offset, the algorithm is very simple and works in
144 	 * _all_ cases as long as the 8254 counter register itself works ok (as
145 	 * an interrupt driving timer it does not because of bug, this is why
146 	 * we are using the onchip r4k counter/compare register to serve this
147 	 * purpose, but for r4k_offset calculation it will work ok for us).
148 	 * There are other very complicated ways of performing this calculation
149 	 * but this one works just fine so I am not going to futz around. ;-)
150 	 */
151 	printk(KERN_INFO "Calibrating system timer... ");
152 	dosample();	/* Prime cache. */
153 	dosample();	/* Prime cache. */
154 	/* Zero is NOT an option. */
155 	do {
156 		r4k_ticks[0] = dosample();
157 	} while (!r4k_ticks[0]);
158 	do {
159 		r4k_ticks[1] = dosample();
160 	} while (!r4k_ticks[1]);
161 
162 	if (r4k_ticks[0] != r4k_ticks[1]) {
163 		printk("warning: timer counts differ, retrying... ");
164 		r4k_ticks[2] = dosample();
165 		if (r4k_ticks[2] == r4k_ticks[0]
166 		    || r4k_ticks[2] == r4k_ticks[1])
167 			r4k_tick = r4k_ticks[2];
168 		else {
169 			printk("disagreement, using average... ");
170 			r4k_tick = (r4k_ticks[0] + r4k_ticks[1]
171 				   + r4k_ticks[2]) / 3;
172 		}
173 	} else
174 		r4k_tick = r4k_ticks[0];
175 
176 	printk("%d [%d.%04d MHz CPU]\n", (int) r4k_tick,
177 		(int) (r4k_tick / (500000 / HZ)),
178 		(int) (r4k_tick % (500000 / HZ)));
179 
180 	mips_hpt_frequency = r4k_tick * HZ;
181 }
182 
183 /* Generic SGI handler for (spurious) 8254 interrupts */
indy_8254timer_irq(struct pt_regs * regs)184 void indy_8254timer_irq(struct pt_regs *regs)
185 {
186 	int cpu = smp_processor_id();
187 	int irq = SGI_8254_0_IRQ;
188 	ULONG cnt;
189 	char c;
190 
191 	irq_enter(cpu, irq);
192 	kstat.irqs[cpu][irq]++;
193 	printk(KERN_ALERT "Oops, got 8254 interrupt.\n");
194 	ArcRead(0, &c, 1, &cnt);
195 	ArcEnterInteractiveMode();
196 	irq_exit(cpu, irq);
197 }
198 
indy_r4k_timer_interrupt(struct pt_regs * regs)199 void indy_r4k_timer_interrupt(struct pt_regs *regs)
200 {
201 	int cpu = smp_processor_id();
202 	int irq = SGI_TIMER_IRQ;
203 
204 	irq_enter(cpu, irq);
205 	kstat.irqs[cpu][irq]++;
206 	timer_interrupt(irq, NULL, regs);
207 	irq_exit(cpu, irq);
208 
209 	if (softirq_pending(cpu))
210 		do_softirq();
211 }
212 
213 extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
214 
indy_timer_setup(struct irqaction * irq)215 static void indy_timer_setup(struct irqaction *irq)
216 {
217 	/* over-write the handler, we use our own way */
218 	irq->handler = no_action;
219 
220 	/* setup irqaction */
221 	setup_irq(SGI_TIMER_IRQ, irq);
222 }
223 
ip22_time_init(void)224 void __init ip22_time_init(void)
225 {
226 	/* setup hookup functions */
227 	rtc_get_time = indy_rtc_get_time;
228 	rtc_set_time = indy_rtc_set_time;
229 
230 	board_time_init = indy_time_init;
231 	board_timer_setup = indy_timer_setup;
232 }
233