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/linux-6.6.21/include/linux/soc/pxa/
Dcpu.h59 #define __cpu_is_pxa210(id) \ argument
65 #define __cpu_is_pxa250(id) \ argument
71 #define __cpu_is_pxa255(id) \ argument
77 #define __cpu_is_pxa25x(id) \ argument
83 #define __cpu_is_pxa210(id) (0) argument
84 #define __cpu_is_pxa250(id) (0) argument
85 #define __cpu_is_pxa255(id) (0) argument
86 #define __cpu_is_pxa25x(id) (0) argument
90 #define __cpu_is_pxa27x(id) \ argument
96 #define __cpu_is_pxa27x(id) (0) argument
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_resource.h197 #define ABM_DCN32_REG_LIST_RI(id) \ argument
214 #define AUD_COMMON_REG_LIST_RI(id) \ argument
228 #define VPG_DCN3_REG_LIST_RI(id) \ argument
238 #define AFMT_DCN3_REG_LIST_RI(id) \ argument
250 #define APG_DCN31_REG_LIST_RI(id) \ argument
257 #define SE_DCN32_REG_LIST_RI(id) \ argument
307 #define AUX_REG_LIST_RI(id) \ argument
313 #define DCN2_AUX_REG_LIST_RI(id) \ argument
319 #define HPD_REG_LIST_RI(id) SRI_ARR(DC_HPD_CONTROL, HPD, id) argument
322 #define LE_DCN3_REG_LIST_RI(id) \ argument
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/linux-6.6.21/tools/power/x86/intel-speed-select/
Disst-core.c63 int isst_is_punit_valid(struct isst_id *id) in isst_is_punit_valid()
106 int isst_read_pm_config(struct isst_id *id, int *cp_state, int *cp_cap) in isst_read_pm_config()
112 int isst_get_ctdp_levels(struct isst_id *id, struct isst_pkg_ctdp *pkg_dev) in isst_get_ctdp_levels()
118 int isst_get_ctdp_control(struct isst_id *id, int config_index, in isst_get_ctdp_control()
125 int isst_get_tdp_info(struct isst_id *id, int config_index, in isst_get_tdp_info()
132 int isst_get_pwr_info(struct isst_id *id, int config_index, in isst_get_pwr_info()
139 int isst_get_coremask_info(struct isst_id *id, int config_index, in isst_get_coremask_info()
146 int isst_get_get_trl_from_msr(struct isst_id *id, int *trl) in isst_get_get_trl_from_msr()
167 int isst_get_get_trl(struct isst_id *id, int level, int avx_level, int *trl) in isst_get_get_trl()
173 int isst_get_get_trls(struct isst_id *id, int level, struct isst_pkg_ctdp_level_info *ctdp_level) in isst_get_get_trls()
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Disst-core-tpmi.c115 static int tpmi_is_punit_valid(struct isst_id *id) in tpmi_is_punit_valid()
134 static int tpmi_read_pm_config(struct isst_id *id, int *cp_state, int *cp_cap) in tpmi_read_pm_config()
152 int tpmi_get_config_levels(struct isst_id *id, struct isst_pkg_ctdp *pkg_dev) in tpmi_get_config_levels()
174 static int tpmi_get_ctdp_control(struct isst_id *id, int config_index, in tpmi_get_ctdp_control()
221 static int tpmi_get_tdp_info(struct isst_id *id, int config_index, in tpmi_get_tdp_info()
258 static int tpmi_get_pwr_info(struct isst_id *id, int config_index, in tpmi_get_pwr_info()
273 int tpmi_get_coremask_info(struct isst_id *id, int config_index, in tpmi_get_coremask_info()
299 static int tpmi_get_get_trls(struct isst_id *id, int config_index, in tpmi_get_get_trls()
326 static int tpmi_get_get_trl(struct isst_id *id, int level, int config_index, in tpmi_get_get_trl()
343 static int tpmi_get_trl_bucket_info(struct isst_id *id, int config_index, in tpmi_get_trl_bucket_info()
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Disst-core-mbox.c64 static int mbox_is_punit_valid(struct isst_id *id) in mbox_is_punit_valid()
219 static int mbox_read_pm_config(struct isst_id *id, int *cp_state, int *cp_cap) in mbox_read_pm_config()
237 static int mbox_get_config_levels(struct isst_id *id, struct isst_pkg_ctdp *pkg_dev) in mbox_get_config_levels()
264 static int mbox_get_ctdp_control(struct isst_id *id, int config_index, in mbox_get_ctdp_control()
299 static void _get_uncore_p0_p1_info(struct isst_id *id, int config_index, in _get_uncore_p0_p1_info()
345 static int _set_uncore_min_max(struct isst_id *id, int max, int freq) in _set_uncore_min_max()
373 static void mbox_adjust_uncore_freq(struct isst_id *id, int config_index, in mbox_adjust_uncore_freq()
384 static void _get_p1_info(struct isst_id *id, int config_index, in _get_p1_info()
408 static void _get_uncore_mem_freq(struct isst_id *id, int config_index, in _get_uncore_mem_freq()
441 static int mbox_get_tdp_info(struct isst_id *id, int config_index, in mbox_get_tdp_info()
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/linux-6.6.21/drivers/gpu/drm/i915/display/
Dintel_dsb_regs.h13 #define DSBSL_INSTANCE(pipe, id) (_DSBSL_INSTANCE_BASE + \ argument
15 #define DSB_HEAD(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x0) argument
16 #define DSB_TAIL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x4) argument
17 #define DSB_CTRL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x8) argument
25 #define DSB_MMIOCTRL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0xc) argument
31 #define DSB_POLLFUNC(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x10) argument
37 #define DSB_DEBUG(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x14) argument
38 #define DSB_POLLMASK(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x1c) argument
39 #define DSB_STATUS(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x24) argument
40 #define DSB_INTERRUPT(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x28) argument
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/linux-6.6.21/sound/soc/tegra/
Dtegra186_asrc.c25 #define ASRC_STREAM_SOURCE_SELECT(id) \ argument
28 #define ASRC_STREAM_REG(reg, id) ((reg) + ((id) * TEGRA186_ASRC_STREAM_STRIDE)) argument
30 #define ASRC_STREAM_REG_DEFAULTS(id) \ argument
72 unsigned int id) in tegra186_asrc_lock_stream()
93 int id; in tegra186_asrc_runtime_resume() local
169 int ret, id = dai->id; in tegra186_asrc_in_hw_params() local
192 int ret, id = dai->id - 7; in tegra186_asrc_out_hw_params() local
248 unsigned int id = asrc_private->reg / TEGRA186_ASRC_STREAM_STRIDE; in tegra186_asrc_get_ratio_source() local
262 unsigned int id = asrc_private->reg / TEGRA186_ASRC_STREAM_STRIDE; in tegra186_asrc_put_ratio_source() local
282 unsigned int id = asrc_private->reg / TEGRA186_ASRC_STREAM_STRIDE; in tegra186_asrc_get_ratio_int() local
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Dtegra210_mixer.c24 #define MIXER_REG(reg, id) ((reg) + ((id) * TEGRA210_MIXER_REG_STRIDE)) argument
27 #define MIXER_GAIN_CFG_RAM_ADDR(id) \ argument
31 #define MIXER_RX_REG_DEFAULTS(id) \ argument
36 #define MIXER_TX_REG_DEFAULTS(id) \ argument
128 unsigned int id, bool instant_gain) in tegra210_mixer_configure_gain()
203 unsigned int reg = mc->reg, id; in tegra210_mixer_apply_gain() local
239 unsigned int id) in tegra210_mixer_set_audio_cif()
306 #define IN_DAI(id) \ argument
330 #define OUT_DAI(id) \ argument
395 #define GAIN_CTRL(id) \ argument
[all …]
/linux-6.6.21/drivers/media/platform/samsung/s3c-camif/
Dcamif-regs.h65 #define CIGCTRL_IRQ_CLR(id) BIT(19 - (id)) argument
71 #define S3C_CAMIF_REG_CIYSA(id, n) (0x18 + (id) * 0x54 + (n) * 4) argument
73 #define S3C_CAMIF_REG_CICBSA(id, n) (0x28 + (id) * 0x54 + (n) * 4) argument
75 #define S3C_CAMIF_REG_CICRSA(id, n) (0x38 + (id) * 0x54 + (n) * 4) argument
78 #define S3C_CAMIF_REG_CITRGFMT(id, _offs) (0x48 + (id) * (0x34 + (_offs))) argument
98 #define S3C_CAMIF_REG_CICTRL(id, _offs) (0x4c + (id) * (0x34 + (_offs))) argument
111 #define S3C_CAMIF_REG_CISCPRERATIO(id, _offs) (0x50 + (id) * (0x34 + (_offs))) argument
114 #define S3C_CAMIF_REG_CISCPREDST(id, _offs) (0x54 + (id) * (0x34 + (_offs))) argument
117 #define S3C_CAMIF_REG_CISCCTRL(id, _offs) (0x58 + (id) * (0x34 + (_offs))) argument
147 #define S3C_CAMIF_REG_CITAREA(id, _offs) (0x5c + (id) * (0x34 + (_offs))) argument
[all …]
/linux-6.6.21/drivers/reset/
Dreset-uniphier.c15 unsigned int id; member
157 #define UNIPHIER_MIO_RESET_SD(id, ch) \ argument
160 #define UNIPHIER_MIO_RESET_SD_BRIDGE(id, ch) \ argument
163 #define UNIPHIER_MIO_RESET_EMMC_HW_RESET(id, ch) \ argument
166 #define UNIPHIER_MIO_RESET_USB2(id, ch) \ argument
169 #define UNIPHIER_MIO_RESET_USB2_BRIDGE(id, ch) \ argument
172 #define UNIPHIER_MIO_RESET_DMAC(id) \ argument
201 #define UNIPHIER_PERI_RESET_UART(id, ch) \ argument
204 #define UNIPHIER_PERI_RESET_I2C(id, ch) \ argument
207 #define UNIPHIER_PERI_RESET_FI2C(id, ch) \ argument
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/linux-6.6.21/drivers/net/ethernet/microchip/sparx5/
Dsparx5_psfp.c23 static int sparx5_psfp_sf_get(u32 *id) in sparx5_psfp_sf_get()
28 static int sparx5_psfp_sf_put(u32 id) in sparx5_psfp_sf_put()
33 static int sparx5_psfp_sg_get(u32 idx, u32 *id) in sparx5_psfp_sg_get()
39 static int sparx5_psfp_sg_put(u32 id) in sparx5_psfp_sg_put()
44 static int sparx5_psfp_fm_get(u32 idx, u32 *id) in sparx5_psfp_fm_get()
50 static int sparx5_psfp_fm_put(u32 id) in sparx5_psfp_fm_put()
103 static void sparx5_psfp_sg_config_change(struct sparx5 *sparx5, u32 id) in sparx5_psfp_sg_config_change()
117 static void sparx5_psfp_sf_set(struct sparx5 *sparx5, u32 id, in sparx5_psfp_sf_set()
131 static int sparx5_psfp_sg_set(struct sparx5 *sparx5, u32 id, in sparx5_psfp_sg_set()
204 u32 *id) in sparx5_psfp_sf_add()
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/linux-6.6.21/fs/smb/server/mgmt/
Duser_session.c26 int id; member
125 void ksmbd_session_rpc_close(struct ksmbd_session *sess, int id) in ksmbd_session_rpc_close()
134 int ksmbd_session_rpc_method(struct ksmbd_session *sess, int id) in ksmbd_session_rpc_method()
159 static struct ksmbd_session *__session_lookup(unsigned long long id) in __session_lookup()
174 unsigned long id; in ksmbd_expire_session() local
215 unsigned long id; in ksmbd_sessions_deregister() local
253 unsigned long long id) in ksmbd_session_lookup()
265 struct ksmbd_session *ksmbd_session_lookup_slowpath(unsigned long long id) in ksmbd_session_lookup_slowpath()
279 unsigned long long id) in ksmbd_session_lookup_all()
309 unsigned long long id) in ksmbd_preauth_session_id_match()
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/linux-6.6.21/include/linux/
Data.h563 #define ata_id_is_ata(id) (((id)[ATA_ID_CONFIG] & (1 << 15)) == 0) argument
564 #define ata_id_has_lba(id) ((id)[ATA_ID_CAPABILITY] & (1 << 9)) argument
565 #define ata_id_has_dma(id) ((id)[ATA_ID_CAPABILITY] & (1 << 8)) argument
566 #define ata_id_has_ncq(id) ((id)[ATA_ID_SATA_CAPABILITY] & (1 << 8)) argument
567 #define ata_id_queue_depth(id) (((id)[ATA_ID_QUEUE_DEPTH] & 0x1f) + 1) argument
568 #define ata_id_removable(id) ((id)[ATA_ID_CONFIG] & (1 << 7)) argument
569 #define ata_id_has_atapi_AN(id) \ argument
573 #define ata_id_has_fpdma_aa(id) \ argument
577 #define ata_id_has_devslp(id) \ argument
581 #define ata_id_has_ncq_autosense(id) \ argument
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/linux-6.6.21/drivers/gpu/host1x/hw/
Dhw_host1x01_sync.h44 static inline u32 host1x_sync_syncpt_r(unsigned int id) in host1x_sync_syncpt_r()
48 #define HOST1X_SYNC_SYNCPT(id) \ argument
50 static inline u32 host1x_sync_syncpt_thresh_cpu0_int_status_r(unsigned int id) in host1x_sync_syncpt_thresh_cpu0_int_status_r()
54 #define HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(id) \ argument
56 static inline u32 host1x_sync_syncpt_thresh_int_disable_r(unsigned int id) in host1x_sync_syncpt_thresh_int_disable_r()
60 #define HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(id) \ argument
62 static inline u32 host1x_sync_syncpt_thresh_int_enable_cpu0_r(unsigned int id) in host1x_sync_syncpt_thresh_int_enable_cpu0_r()
66 #define HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(id) \ argument
116 static inline u32 host1x_sync_mlock_owner_r(unsigned int id) in host1x_sync_mlock_owner_r()
120 #define HOST1X_SYNC_MLOCK_OWNER(id) \ argument
[all …]
Dhw_host1x02_sync.h44 static inline u32 host1x_sync_syncpt_r(unsigned int id) in host1x_sync_syncpt_r()
48 #define HOST1X_SYNC_SYNCPT(id) \ argument
50 static inline u32 host1x_sync_syncpt_thresh_cpu0_int_status_r(unsigned int id) in host1x_sync_syncpt_thresh_cpu0_int_status_r()
54 #define HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(id) \ argument
56 static inline u32 host1x_sync_syncpt_thresh_int_disable_r(unsigned int id) in host1x_sync_syncpt_thresh_int_disable_r()
60 #define HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(id) \ argument
62 static inline u32 host1x_sync_syncpt_thresh_int_enable_cpu0_r(unsigned int id) in host1x_sync_syncpt_thresh_int_enable_cpu0_r()
66 #define HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(id) \ argument
116 static inline u32 host1x_sync_mlock_owner_r(unsigned int id) in host1x_sync_mlock_owner_r()
120 #define HOST1X_SYNC_MLOCK_OWNER(id) \ argument
[all …]
Dhw_host1x04_sync.h44 static inline u32 host1x_sync_syncpt_r(unsigned int id) in host1x_sync_syncpt_r()
48 #define HOST1X_SYNC_SYNCPT(id) \ argument
50 static inline u32 host1x_sync_syncpt_thresh_cpu0_int_status_r(unsigned int id) in host1x_sync_syncpt_thresh_cpu0_int_status_r()
54 #define HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(id) \ argument
56 static inline u32 host1x_sync_syncpt_thresh_int_disable_r(unsigned int id) in host1x_sync_syncpt_thresh_int_disable_r()
60 #define HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(id) \ argument
62 static inline u32 host1x_sync_syncpt_thresh_int_enable_cpu0_r(unsigned int id) in host1x_sync_syncpt_thresh_int_enable_cpu0_r()
66 #define HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(id) \ argument
116 static inline u32 host1x_sync_mlock_owner_r(unsigned int id) in host1x_sync_mlock_owner_r()
120 #define HOST1X_SYNC_MLOCK_OWNER(id) \ argument
[all …]
Dhw_host1x05_sync.h44 static inline u32 host1x_sync_syncpt_r(unsigned int id) in host1x_sync_syncpt_r()
48 #define HOST1X_SYNC_SYNCPT(id) \ argument
50 static inline u32 host1x_sync_syncpt_thresh_cpu0_int_status_r(unsigned int id) in host1x_sync_syncpt_thresh_cpu0_int_status_r()
54 #define HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(id) \ argument
56 static inline u32 host1x_sync_syncpt_thresh_int_disable_r(unsigned int id) in host1x_sync_syncpt_thresh_int_disable_r()
60 #define HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(id) \ argument
62 static inline u32 host1x_sync_syncpt_thresh_int_enable_cpu0_r(unsigned int id) in host1x_sync_syncpt_thresh_int_enable_cpu0_r()
66 #define HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(id) \ argument
116 static inline u32 host1x_sync_mlock_owner_r(unsigned int id) in host1x_sync_mlock_owner_r()
120 #define HOST1X_SYNC_MLOCK_OWNER(id) \ argument
[all …]
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn321/
Ddcn321_resource.c118 #define SR_ARR(reg_name, id)\ argument
121 #define SR_ARR_INIT(reg_name, id, value)\ argument
124 #define SRI(reg_name, block, id)\ argument
128 #define SRI_ARR(reg_name, block, id)\ argument
132 #define SR_ARR_I2C(reg_name, id) \ argument
135 #define SRI_ARR_I2C(reg_name, block, id)\ argument
139 #define SRI_ARR_ALPHABET(reg_name, block, index, id)\ argument
143 #define SRI2(reg_name, block, id)\ argument
146 #define SRI2_ARR(reg_name, block, id)\ argument
150 #define SRIR(var_name, reg_name, block, id)\ argument
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/linux-6.6.21/drivers/gpu/drm/msm/dsi/
Ddsi_manager.c35 #define IS_MASTER_DSI_LINK(id) (msm_dsim_glb.master_dsi_link_id == id) argument
37 static inline struct msm_dsi *dsi_mgr_get_dsi(int id) in dsi_mgr_get_dsi()
42 static inline struct msm_dsi *dsi_mgr_get_other_dsi(int id) in dsi_mgr_get_other_dsi()
47 static int dsi_mgr_parse_of(struct device_node *np, int id) in dsi_mgr_parse_of()
68 static int dsi_mgr_setup_components(int id) in dsi_mgr_setup_components()
126 dsi_mgr_phy_enable(int id, in dsi_mgr_phy_enable()
167 static void dsi_mgr_phy_disable(int id) in dsi_mgr_phy_disable()
190 int id; member
201 static void msm_dsi_manager_set_split_display(u8 id) in msm_dsi_manager_set_split_display()
233 int id = dsi_mgr_bridge_get_id(bridge); in dsi_mgr_bridge_power_on() local
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/linux-6.6.21/drivers/hwtracing/coresight/
Dcoresight-trace-id.c38 #define DUMP_ID_CPU(cpu, id) pr_debug("%s called; cpu=%d, id=%d\n", __func__, cpu, id) argument
39 #define DUMP_ID(id) pr_debug("%s called; id=%d\n", __func__, id) argument
43 #define DUMP_ID(id) argument
44 #define DUMP_ID_CPU(cpu, id) argument
85 int id = 0; in coresight_trace_id_alloc_new_id() local
113 static void coresight_trace_id_free(int id, struct coresight_trace_id_map *id_map) in coresight_trace_id_free()
122 static void coresight_trace_id_set_pend_rel(int id, struct coresight_trace_id_map *id_map) in coresight_trace_id_set_pend_rel()
157 int id; in coresight_trace_id_map_get_cpu_id() local
201 int id; in coresight_trace_id_map_put_cpu_id() local
228 int id; in coresight_trace_id_map_get_system_id() local
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn301/
Ddcn301_resource.c118 #define SRI(reg_name, block, id)\ argument
122 #define SRI2(reg_name, block, id)\ argument
126 #define SRIR(var_name, reg_name, block, id)\ argument
130 #define SRII(reg_name, block, id)\ argument
134 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
139 #define SRII_MPC_RMU(reg_name, block, id)\ argument
143 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
147 #define SF_DWB2(reg_name, block, id, field_name, post_fix) \ argument
150 #define DCCG_SRII(reg_name, block, id)\ argument
154 #define VUPDATE_SRII(reg_name, block, id)\ argument
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn302/
Ddcn302_resource.c179 #define SRI(reg_name, block, id)\ argument
182 #define SRI2(reg_name, block, id)\ argument
185 #define SRII(reg_name, block, id)\ argument
189 #define DCCG_SRII(reg_name, block, id)\ argument
193 #define VUPDATE_SRII(reg_name, block, id)\ argument
197 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
201 #define SF_DWB2(reg_name, block, id, field_name, post_fix) \ argument
204 #define SRII_MPC_RMU(reg_name, block, id)\ argument
220 #define vmid_regs(id)\ argument
274 #define vpg_regs(id)\ argument
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn303/
Ddcn303_resource.c157 #define SRI(reg_name, block, id)\ argument
160 #define SRI2(reg_name, block, id)\ argument
163 #define SRII(reg_name, block, id)\ argument
167 #define DCCG_SRII(reg_name, block, id)\ argument
171 #define VUPDATE_SRII(reg_name, block, id)\ argument
175 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
179 #define SF_DWB2(reg_name, block, id, field_name, post_fix) \ argument
182 #define SRII_MPC_RMU(reg_name, block, id)\ argument
198 #define vmid_regs(id)\ argument
252 #define vpg_regs(id)\ argument
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/linux-6.6.21/drivers/net/ethernet/intel/fm10k/
Dfm10k_tlv.h62 unsigned int id; member
67 #define FM10K_TLV_ATTR_NULL_STRING(id, len) { id, FM10K_TLV_NULL_STRING, len } argument
68 #define FM10K_TLV_ATTR_MAC_ADDR(id) { id, FM10K_TLV_MAC_ADDR, 6 } argument
69 #define FM10K_TLV_ATTR_BOOL(id) { id, FM10K_TLV_BOOL, 0 } argument
70 #define FM10K_TLV_ATTR_U8(id) { id, FM10K_TLV_UNSIGNED, 1 } argument
71 #define FM10K_TLV_ATTR_U16(id) { id, FM10K_TLV_UNSIGNED, 2 } argument
72 #define FM10K_TLV_ATTR_U32(id) { id, FM10K_TLV_UNSIGNED, 4 } argument
73 #define FM10K_TLV_ATTR_U64(id) { id, FM10K_TLV_UNSIGNED, 8 } argument
74 #define FM10K_TLV_ATTR_S8(id) { id, FM10K_TLV_SIGNED, 1 } argument
75 #define FM10K_TLV_ATTR_S16(id) { id, FM10K_TLV_SIGNED, 2 } argument
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/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn316/
Ddcn316_resource.c153 #define SRI(reg_name, block, id)\ argument
157 #define SRI2(reg_name, block, id)\ argument
161 #define SRIR(var_name, reg_name, block, id)\ argument
165 #define SRII(reg_name, block, id)\ argument
169 #define SRII_MPC_RMU(reg_name, block, id)\ argument
173 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
177 #define SF_DWB2(reg_name, block, id, field_name, post_fix) \ argument
180 #define DCCG_SRII(reg_name, block, id)\ argument
184 #define VUPDATE_SRII(reg_name, block, id)\ argument
225 #define abm_regs(id)\ argument
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