/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_dpp_cm.c | 51 struct dpp *dpp_base) in dpp2_enable_cm_block() 65 struct dpp *dpp_base, in dpp2_degamma_ram_inuse() 86 struct dpp *dpp_base, in dpp2_program_degamma_lut() 117 struct dpp *dpp_base, in dpp2_set_degamma_pwl() 135 struct dpp *dpp_base, in dpp2_set_degamma() 214 struct dpp *dpp_base, in dpp2_cm_set_gamut_remap() 238 struct dpp *dpp_base, in dpp2_program_input_csc() 311 struct dpp *dpp_base, in dpp20_power_on_blnd_lut() 322 struct dpp *dpp_base, in dpp20_configure_blnd_lut() 335 struct dpp *dpp_base, in dpp20_program_blnd_pwl() [all …]
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D | dcn20_dpp.c | 51 void dpp20_read_state(struct dpp *dpp_base, in dpp20_read_state() 76 struct dpp *dpp_base, in dpp2_power_on_obuf() 91 struct dpp *dpp_base, in dpp2_dummy_program_input_lut() 96 struct dpp *dpp_base, in dpp2_cnv_setup() 315 struct dpp *dpp_base, in dpp2_cnv_set_alpha_keyer() 338 struct dpp *dpp_base, in dpp2_set_cursor_attributes()
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D | dcn20_hwseq.c | 844 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn20_set_blend_lut() local 866 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn20_set_shaper_3dlut() local 897 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn20_set_input_transfer_func() local
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/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | dcn30_dpp.c | 44 static void dpp30_read_state(struct dpp *dpp_base, struct dcn_dpp_state *s) in dpp30_read_state() 55 struct dpp *dpp_base, in dpp3_program_post_csc() 128 void dpp3_set_pre_degam(struct dpp *dpp_base, enum dc_transfer_func_predefined tr) in dpp3_set_pre_degam() 171 struct dpp *dpp_base, in dpp3_cnv_setup() 352 struct dpp *dpp_base, in dpp3_set_cursor_attributes() 479 static void dpp3_deferred_update(struct dpp *dpp_base) in dpp3_deferred_update() 527 struct dpp *dpp_base, in dpp3_power_on_blnd_lut() 547 struct dpp *dpp_base, in dpp3_power_on_hdr3dlut() 564 struct dpp *dpp_base, in dpp3_power_on_shaper() 581 struct dpp *dpp_base, in dpp3_configure_blnd_lut() [all …]
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D | dcn30_dpp_cm.c | 44 struct dpp *dpp_base) in dpp3_enable_cm_block() 57 static enum dc_lut_mode dpp30_get_gamcor_current(struct dpp *dpp_base) in dpp30_get_gamcor_current() 84 struct dpp *dpp_base, in dpp3_program_gammcor_lut() 133 struct dpp *dpp_base, in dpp3_power_on_gamcor_lut() 152 struct dpp *dpp_base, in dpp3_program_cm_dealpha() 163 struct dpp *dpp_base, in dpp3_program_cm_bias() 208 struct dpp *dpp_base, in dpp3_configure_gamcor_lut() 222 struct dpp *dpp_base, const struct pwl_params *params) in dpp3_program_gamcor_lut() 311 struct dpp *dpp_base, in dpp3_set_hdr_multiplier() 380 struct dpp *dpp_base, in dpp3_cm_set_gamut_remap()
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D | dcn30_hwseq.c | 74 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn30_set_blend_lut() local 95 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn30_set_mpc_shaper_3dlut() local 149 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn30_set_input_transfer_func() local
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/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn10/ |
D | dcn10_dpp_cm.c | 161 struct dpp *dpp_base, in dpp1_cm_set_gamut_remap() 240 struct dpp *dpp_base, in dpp1_cm_set_output_csc_default() 310 struct dpp *dpp_base, in dpp1_cm_set_output_csc_adjustment() 318 void dpp1_cm_power_on_regamma_lut(struct dpp *dpp_base, in dpp1_cm_power_on_regamma_lut() 328 void dpp1_cm_program_regamma_lut(struct dpp *dpp_base, in dpp1_cm_program_regamma_lut() 351 struct dpp *dpp_base, in dpp1_cm_configure_regamma_lut() 365 struct dpp *dpp_base, in dpp1_cm_program_regamma_luta_settings() 394 struct dpp *dpp_base, in dpp1_cm_program_regamma_lutb_settings() 421 struct dpp *dpp_base, in dpp1_program_input_csc() 497 struct dpp *dpp_base, in dpp1_program_bias_and_scale() [all …]
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D | dcn10_dpp.c | 94 void dpp_read_state(struct dpp *dpp_base, in dpp_read_state() 188 void dpp_reset(struct dpp *dpp_base) in dpp_reset() 204 struct dpp *dpp_base, const struct pwl_params *params, enum opp_regamma mode) in dpp1_cm_set_regamma_pwl() 260 struct dpp *dpp_base, in dpp1_set_degamma_format_float() 275 struct dpp *dpp_base, in dpp1_cnv_setup() 411 struct dpp *dpp_base, in dpp1_set_cursor_attributes() 432 struct dpp *dpp_base, in dpp1_set_cursor_position() 474 struct dpp *dpp_base, in dpp1_cnv_set_optional_cursor_attributes() 486 struct dpp *dpp_base, in dpp1_dppclk_control()
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D | dcn10_dpp_dscl.c | 127 struct dpp *dpp_base, in dpp1_dscl_get_dscl_mode() 161 struct dpp *dpp_base, in dpp1_power_on_dscl() 630 void dpp1_dscl_set_scaler_manual_scale(struct dpp *dpp_base, in dpp1_dscl_set_scaler_manual_scale()
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D | dcn10_hw_sequencer.c | 1724 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn10_set_input_transfer_func() local
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/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn201/ |
D | dcn201_dpp.c | 45 struct dpp *dpp_base, in dpp201_cnv_setup()
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