1 /* 2 * linux/include/linux/mtd/nand.h 3 * 4 * Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com> 5 * Steven J. Hill <sjhill@cotw.com> 6 * Thomas Gleixner <tglx@linutronix.de> 7 * 8 * $Id: nand.h,v 1.19 2002/12/02 21:48:17 gleixner Exp $ 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 * Info: 15 * Contains standard defines and IDs for NAND flash devices 16 * 17 * Changelog: 18 * 01-31-2000 DMW Created 19 * 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers 20 * so it can be used by other NAND flash device 21 * drivers. I also changed the copyright since none 22 * of the original contents of this file are specific 23 * to DoC devices. David can whack me with a baseball 24 * bat later if I did something naughty. 25 * 10-11-2000 SJH Added private NAND flash structure for driver 26 * 10-24-2000 SJH Added prototype for 'nand_scan' function 27 * 10-29-2001 TG changed nand_chip structure to support 28 * hardwarespecific function for accessing control lines 29 * 02-21-2002 TG added support for different read/write adress and 30 * ready/busy line access function 31 * 02-26-2002 TG added chip_delay to nand_chip structure to optimize 32 * command delay times for different chips 33 * 04-28-2002 TG OOB config defines moved from nand.c to avoid duplicate 34 * defines in jffs2/wbuf.c 35 * 08-07-2002 TG forced bad block location to byte 5 of OOB, even if 36 * CONFIG_MTD_NAND_ECC_JFFS2 is not set 37 * 08-10-2002 TG extensions to nand_chip structure to support HW-ECC 38 * 39 * 08-29-2002 tglx nand_chip structure: data_poi for selecting 40 * internal / fs-driver buffer 41 * support for 6byte/512byte hardware ECC 42 * read_ecc, write_ecc extended for different oob-layout 43 * oob layout selections: NAND_NONE_OOB, NAND_JFFS2_OOB, 44 * NAND_YAFFS_OOB 45 * 11-25-2002 tglx Added Manufacturer code FUJITSU, NATIONAL 46 * Split manufacturer and device ID structures 47 */ 48 #ifndef __LINUX_MTD_NAND_H 49 #define __LINUX_MTD_NAND_H 50 51 #include <linux/config.h> 52 #include <linux/sched.h> 53 54 /* 55 * Searches for a NAND device 56 */ 57 extern int nand_scan (struct mtd_info *mtd); 58 59 /* 60 * Constants for hardware specific CLE/ALE/NCE function 61 */ 62 #define NAND_CTL_SETNCE 1 63 #define NAND_CTL_CLRNCE 2 64 #define NAND_CTL_SETCLE 3 65 #define NAND_CTL_CLRCLE 4 66 #define NAND_CTL_SETALE 5 67 #define NAND_CTL_CLRALE 6 68 69 /* 70 * Standard NAND flash commands 71 */ 72 #define NAND_CMD_READ0 0 73 #define NAND_CMD_READ1 1 74 #define NAND_CMD_PAGEPROG 0x10 75 #define NAND_CMD_READOOB 0x50 76 #define NAND_CMD_ERASE1 0x60 77 #define NAND_CMD_STATUS 0x70 78 #define NAND_CMD_SEQIN 0x80 79 #define NAND_CMD_READID 0x90 80 #define NAND_CMD_ERASE2 0xd0 81 #define NAND_CMD_RESET 0xff 82 83 /* 84 * Constants for ECC_MODES 85 * 86 * NONE: No ECC 87 * SOFT: Software ECC 3 byte ECC per 256 Byte data 88 * HW3_256: Hardware ECC 3 byte ECC per 256 Byte data 89 * HW3_512: Hardware ECC 3 byte ECC per 512 Byte data 90 * 91 * 92 */ 93 #define NAND_ECC_NONE 0 94 #define NAND_ECC_SOFT 1 95 #define NAND_ECC_HW3_256 2 96 #define NAND_ECC_HW3_512 3 97 #define NAND_ECC_HW6_512 4 98 #define NAND_ECC_DISKONCHIP 5 99 100 /* 101 * Constants for Hardware ECC 102 */ 103 #define NAND_ECC_READ 0 104 #define NAND_ECC_WRITE 1 105 106 /* 107 * Enumeration for NAND flash chip state 108 */ 109 typedef enum { 110 FL_READY, 111 FL_READING, 112 FL_WRITING, 113 FL_ERASING, 114 FL_SYNCING 115 } nand_state_t; 116 117 118 /* 119 * NAND Private Flash Chip Data 120 * 121 * Structure overview: 122 * 123 * IO_ADDR_R - address to read the 8 I/O lines of the flash device 124 * 125 * IO_ADDR_W - address to write the 8 I/O lines of the flash device 126 * 127 * hwcontrol - hardwarespecific function for accesing control-lines 128 * 129 * dev_ready - hardwarespecific function for accesing device ready/busy line 130 * 131 * waitfunc - hardwarespecific function for wait on ready 132 * 133 * calculate_ecc - function for ecc calculation or readback from ecc hardware 134 * 135 * correct_data - function for ecc correction, matching to ecc generator (sw/hw) 136 * 137 * enable_hwecc - function to enable (reset) hardware ecc generator 138 * 139 * eccmod - mode of ecc: see constants 140 * 141 * eccsize - databytes used per ecc-calculation 142 * 143 * chip_delay - chip dependent delay for transfering data from array to read regs (tR) 144 * 145 * chip_lock - spinlock used to protect access to this structure 146 * 147 * wq - wait queue to sleep on if a NAND operation is in progress 148 * 149 * state - give the current state of the NAND device 150 * 151 * page_shift - number of address bits in a page (column address bits) 152 * 153 * data_buf - data buffer passed to/from MTD user modules 154 * 155 * data_cache - data cache for redundant page access and shadow for 156 * ECC failure 157 * 158 * cache_page - number of last valid page in page_cache 159 */ 160 struct nand_chip { 161 unsigned long IO_ADDR_R; 162 unsigned long IO_ADDR_W; 163 void (*hwcontrol)(int cmd); 164 int (*dev_ready)(void); 165 void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr); 166 int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this, int state); 167 void (*calculate_ecc)(const u_char *dat, u_char *ecc_code); 168 int (*correct_data)(u_char *dat, u_char *read_ecc, u_char *calc_ecc); 169 void (*enable_hwecc)(int mode); 170 int eccmode; 171 int eccsize; 172 int chip_delay; 173 spinlock_t chip_lock; 174 wait_queue_head_t wq; 175 nand_state_t state; 176 int page_shift; 177 u_char *data_buf; 178 u_char *data_poi; 179 u_char *data_cache; 180 int cache_page; 181 }; 182 183 /* 184 * NAND Flash Manufacturer ID Codes 185 */ 186 #define NAND_MFR_TOSHIBA 0x98 187 #define NAND_MFR_SAMSUNG 0xec 188 #define NAND_MFR_FUJITSU 0x04 189 #define NAND_MFR_NATIONAL 0x8f 190 191 /* 192 * NAND Flash Device ID Structure 193 * 194 * Structure overview: 195 * 196 * name - Identify the device type 197 * 198 * id - device ID code 199 * 200 * chipshift - total number of address bits for the device which 201 * is used to calculate address offsets and the total 202 * number of bytes the device is capable of. 203 * 204 * page256 - denotes if flash device has 256 byte pages or not. 205 * 206 * pageadrlen - number of bytes minus one needed to hold the 207 * complete address into the flash array. Keep in 208 * mind that when a read or write is done to a 209 * specific address, the address is input serially 210 * 8 bits at a time. This structure member is used 211 * by the read/write routines as a loop index for 212 * shifting the address out 8 bits at a time. 213 * 214 * erasesize - size of an erase block in the flash device. 215 */ 216 struct nand_flash_dev { 217 char * name; 218 int id; 219 int chipshift; 220 unsigned long erasesize; 221 char page256; 222 }; 223 224 /* 225 * NAND Flash Manufacturer ID Structure 226 * 227 * name - Manufacturer name 228 * 229 * id - manufacturer ID code of device. 230 */ 231 struct nand_manufacturers { 232 int id; 233 char * name; 234 }; 235 236 extern struct nand_flash_dev nand_flash_ids[]; 237 extern struct nand_manufacturers nand_manuf_ids[]; 238 239 /* 240 * Constants for oob configuration 241 */ 242 #define NAND_BADBLOCK_POS 5 243 244 #define NAND_NONE_OOB 0 245 #define NAND_JFFS2_OOB 1 246 #define NAND_YAFFS_OOB 2 247 248 #define NAND_NOOB_ECCPOS0 0 249 #define NAND_NOOB_ECCPOS1 1 250 #define NAND_NOOB_ECCPOS2 2 251 #define NAND_NOOB_ECCPOS3 3 252 #define NAND_NOOB_ECCPOS4 6 253 #define NAND_NOOB_ECCPOS5 7 254 255 #define NAND_JFFS2_OOB_ECCPOS0 0 256 #define NAND_JFFS2_OOB_ECCPOS1 1 257 #define NAND_JFFS2_OOB_ECCPOS2 2 258 #define NAND_JFFS2_OOB_ECCPOS3 3 259 #define NAND_JFFS2_OOB_ECCPOS4 6 260 #define NAND_JFFS2_OOB_ECCPOS5 7 261 262 #define NAND_YAFFS_OOB_ECCPOS0 8 263 #define NAND_YAFFS_OOB_ECCPOS1 9 264 #define NAND_YAFFS_OOB_ECCPOS2 10 265 #define NAND_YAFFS_OOB_ECCPOS3 13 266 #define NAND_YAFFS_OOB_ECCPOS4 14 267 #define NAND_YAFFS_OOB_ECCPOS5 15 268 269 #define NAND_JFFS2_OOB8_FSDAPOS 6 270 #define NAND_JFFS2_OOB16_FSDAPOS 8 271 #define NAND_JFFS2_OOB8_FSDALEN 2 272 #define NAND_JFFS2_OOB16_FSDALEN 8 273 274 #endif /* __LINUX_MTD_NAND_H */ 275