33 	WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_MEM_FLUSH_CNTL,  in nbio_v4_3_remap_hdp_registers()
35 	WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_REG_FLUSH_CNTL,  in nbio_v4_3_remap_hdp_registers()
52 		WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN,  in nbio_v4_3_mc_access_enable()
56 		WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN, 0);  in nbio_v4_3_mc_access_enable()
98 		WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_2_CTRL, doorbell_range);  in nbio_v4_3_sdma_doorbell_range()
140 		WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_5_CTRL, doorbell_range);  in nbio_v4_3_vcn_doorbell_range()
142 		WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_4_CTRL, doorbell_range);  in nbio_v4_3_vcn_doorbell_range()
147 	WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_0_CTRL, 0x30000007);  in nbio_v4_3_gc_doorbell_init()
148 	WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_3_CTRL, 0x3000000d);  in nbio_v4_3_gc_doorbell_init()
171 		WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW,  in nbio_v4_3_enable_doorbell_selfring_aperture()
173 		WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,  in nbio_v4_3_enable_doorbell_selfring_aperture()
177 	WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL,  in nbio_v4_3_enable_doorbell_selfring_aperture()
213 	WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_1_CTRL, ih_doorbell_range);  in nbio_v4_3_ih_doorbell_range()
221 	WREG32_SOC15(NBIO, 0, regBIF_BX0_INTERRUPT_CNTL2, adev->dummy_page_addr >> 8);  in nbio_v4_3_ih_control()
235 	WREG32_SOC15(NBIO, 0, regBIF_BX0_INTERRUPT_CNTL, interrupt_cntl);  in nbio_v4_3_ih_control()
264 		WREG32_SOC15(NBIO, 0, regCPM_CONTROL, data);  in nbio_v4_3_update_medium_grain_clock_gating()
284 		WREG32_SOC15(NBIO, 0, regPCIE_CNTL2, data);  in nbio_v4_3_update_medium_grain_light_sleep()
363 		WREG32_SOC15(NBIO, 0, regRCC_EP_DEV0_0_EP_PCIE_TX_LTR_CNTL, data);  in nbio_v4_3_program_ltr()
368 		WREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_BIF_STRAP2, data);  in nbio_v4_3_program_ltr()
376 		WREG32_SOC15(NBIO, 0, regBIF_CFG_DEV0_EPF0_DEVICE_CNTL2, data);  in nbio_v4_3_program_ltr()
394 		WREG32_SOC15(NBIO, 0, regPCIE_LC_CNTL, data);  in nbio_v4_3_program_aspm()
399 		WREG32_SOC15(NBIO, 0, regPCIE_LC_CNTL7, data);  in nbio_v4_3_program_aspm()
404 		WREG32_SOC15(NBIO, 0, regPCIE_LC_CNTL3, data);  in nbio_v4_3_program_aspm()
410 		WREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_BIF_STRAP3, data);  in nbio_v4_3_program_aspm()
415 		WREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_BIF_STRAP5, data);  in nbio_v4_3_program_aspm()
420 		WREG32_SOC15(NBIO, 0, regBIF_CFG_DEV0_EPF0_DEVICE_CNTL2, data);  in nbio_v4_3_program_aspm()
422 	WREG32_SOC15(NBIO, 0, regBIF_CFG_DEV0_EPF0_PCIE_LTR_CAP, 0x10011001);  in nbio_v4_3_program_aspm()
429 		WREG32_SOC15(NBIO, 0, regPSWUSP0_PCIE_LC_CNTL2, data);  in nbio_v4_3_program_aspm()
434 		WREG32_SOC15(NBIO, 0, regPCIE_LC_CNTL4, data);  in nbio_v4_3_program_aspm()
439 		WREG32_SOC15(NBIO, 0, regPCIE_LC_RXRECOVER_RXSTANDBY_CNTL, data);  in nbio_v4_3_program_aspm()
447 		WREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_BIF_STRAP3, data);  in nbio_v4_3_program_aspm()
452 		WREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_BIF_STRAP5, data);  in nbio_v4_3_program_aspm()
459 		WREG32_SOC15(NBIO, 0, regPCIE_LC_CNTL, data);  in nbio_v4_3_program_aspm()
464 		WREG32_SOC15(NBIO, 0, regPCIE_LC_CNTL3, data);  in nbio_v4_3_program_aspm()