45 #define dma_outb	outb_p  macro
47 #define dma_outb	outb  macro
198 		dma_outb(0, DMA2_MASK_REG);	/* This may not be enabled */  in enable_dma()
199 		dma_outb(ucDmaCmd, DMA2_CMD_REG);	/* Enable group */  in enable_dma()
202 		dma_outb(dmanr, DMA1_MASK_REG);  in enable_dma()
203 		dma_outb(ucDmaCmd, DMA1_CMD_REG);	/* Enable group */  in enable_dma()
205 		dma_outb(dmanr & 3, DMA2_MASK_REG);  in enable_dma()
211 		dma_outb(dmanr | 4, DMA1_MASK_REG);  in disable_dma()
213 		dma_outb((dmanr & 3) | 4, DMA2_MASK_REG);  in disable_dma()
226 		dma_outb(0, DMA1_CLEAR_FF_REG);  in clear_dma_ff()
228 		dma_outb(0, DMA2_CLEAR_FF_REG);  in clear_dma_ff()
235 		dma_outb(mode | dmanr, DMA1_MODE_REG);  in set_dma_mode()
237 		dma_outb(mode | (dmanr & 3), DMA2_MODE_REG);  in set_dma_mode()
249 			dma_outb(pagenr, DMA_LO_PAGE_0);  in set_dma_page()
250 			dma_outb(pagenr >> 8, DMA_HI_PAGE_0);  in set_dma_page()
253 			dma_outb(pagenr, DMA_LO_PAGE_1);  in set_dma_page()
254 			dma_outb(pagenr >> 8, DMA_HI_PAGE_1);  in set_dma_page()
257 			dma_outb(pagenr, DMA_LO_PAGE_2);  in set_dma_page()
258 			dma_outb(pagenr >> 8, DMA_HI_PAGE_2);  in set_dma_page()
261 			dma_outb(pagenr, DMA_LO_PAGE_3);  in set_dma_page()
262 			dma_outb(pagenr >> 8, DMA_HI_PAGE_3);  in set_dma_page()
266 				dma_outb(pagenr, DMA_LO_PAGE_5);  in set_dma_page()
268 				dma_outb(pagenr & 0xfe, DMA_LO_PAGE_5);  in set_dma_page()
269 			dma_outb(pagenr >> 8, DMA_HI_PAGE_5);  in set_dma_page()
273 				dma_outb(pagenr, DMA_LO_PAGE_6);  in set_dma_page()
275 				dma_outb(pagenr & 0xfe, DMA_LO_PAGE_6);  in set_dma_page()
276 			dma_outb(pagenr >> 8, DMA_HI_PAGE_6);  in set_dma_page()
280 				dma_outb(pagenr, DMA_LO_PAGE_7);  in set_dma_page()
282 				dma_outb(pagenr & 0xfe, DMA_LO_PAGE_7);  in set_dma_page()
283 			dma_outb(pagenr >> 8, DMA_HI_PAGE_7);  in set_dma_page()
295 		dma_outb(phys & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE );  in set_dma_addr()
296 		dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE);  in set_dma_addr()
298 		dma_outb(phys  & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE );  in set_dma_addr()
299 		dma_outb((phys >> 8)  & 0xff, ((dmanr & 3) << 2) +  in set_dma_addr()
301 		dma_outb((dmanr & 3), DMA2_EXT_REG);  in set_dma_addr()
303 		dma_outb((phys >> 1) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);  in set_dma_addr()
304 		dma_outb((phys >> 9) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);  in set_dma_addr()
322 		dma_outb(count & 0xff, ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);  in set_dma_count()
323 		dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 1) + 1 +  in set_dma_count()
326 		dma_outb( count & 0xff, ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);  in set_dma_count()
327 		dma_outb( (count >> 8) & 0xff, ((dmanr & 3) << 2) + 2 +  in set_dma_count()
330 		dma_outb((count >> 1) & 0xff, ((dmanr & 3) << 2) + 2 +  in set_dma_count()
332 		dma_outb((count >> 9) & 0xff, ((dmanr & 3) << 2) + 2 +  in set_dma_count()