Lines Matching refs:AT91_REG
25 AT91_REG EMAC_CTL; // Network Control Register
26 AT91_REG EMAC_CFG; // Network Configuration Register
27 AT91_REG EMAC_SR; // Network Status Register
28 AT91_REG EMAC_TAR; // Transmit Address Register
29 AT91_REG EMAC_TCR; // Transmit Control Register
30 AT91_REG EMAC_TSR; // Transmit Status Register
31 AT91_REG EMAC_RBQP; // Receive Buffer Queue Pointer
32 AT91_REG Reserved0[1]; //
33 AT91_REG EMAC_RSR; // Receive Status Register
34 AT91_REG EMAC_ISR; // Interrupt Status Register
35 AT91_REG EMAC_IER; // Interrupt Enable Register
36 AT91_REG EMAC_IDR; // Interrupt Disable Register
37 AT91_REG EMAC_IMR; // Interrupt Mask Register
38 AT91_REG EMAC_MAN; // PHY Maintenance Register
39 AT91_REG Reserved1[2]; //
40 AT91_REG EMAC_FRA; // Frames Transmitted OK Register
41 AT91_REG EMAC_SCOL; // Single Collision Frame Register
42 AT91_REG EMAC_MCOL; // Multiple Collision Frame Register
43 AT91_REG EMAC_OK; // Frames Received OK Register
44 AT91_REG EMAC_SEQE; // Frame Check Sequence Error Register
45 AT91_REG EMAC_ALE; // Alignment Error Register
46 AT91_REG EMAC_DTE; // Deferred Transmission Frame Register
47 AT91_REG EMAC_LCOL; // Late Collision Register
48 AT91_REG EMAC_ECOL; // Excessive Collision Register
49 AT91_REG EMAC_CSE; // Carrier Sense Error Register
50 AT91_REG EMAC_TUE; // Transmit Underrun Error Register
51 AT91_REG EMAC_CDE; // Code Error Register
52 AT91_REG EMAC_ELR; // Excessive Length Error Register
53 AT91_REG EMAC_RJB; // Receive Jabber Register
54 AT91_REG EMAC_USF; // Undersize Frame Register
55 AT91_REG EMAC_SQEE; // SQE Test Error Register
56 AT91_REG EMAC_DRFC; // Discarded RX Frame Register
57 AT91_REG Reserved2[3]; //
58 AT91_REG EMAC_HSH; // Hash Address High[63:32]
59 AT91_REG EMAC_HSL; // Hash Address Low[31:0]
60 AT91_REG EMAC_SA1L; // Specific Address 1 Low, First 4 bytes
61 AT91_REG EMAC_SA1H; // Specific Address 1 High, Last 2 bytes
62 AT91_REG EMAC_SA2L; // Specific Address 2 Low, First 4 bytes
63 AT91_REG EMAC_SA2H; // Specific Address 2 High, Last 2 bytes
64 AT91_REG EMAC_SA3L; // Specific Address 3 Low, First 4 bytes
65 AT91_REG EMAC_SA3H; // Specific Address 3 High, Last 2 bytes
66 AT91_REG EMAC_SA4L; // Specific Address 4 Low, First 4 bytes
67 AT91_REG EMAC_SA4H; // Specific Address 4 High, Last 2 bytesr