Lines Matching refs:ch
112 static void tx_dma_buf_pt_init(pc300_t * card, int ch) in tx_dma_buf_pt_init() argument
115 int ch_factor = ch * N_DMA_TX_BUF; in tx_dma_buf_pt_init()
127 static void tx_dma_buf_init(pc300_t * card, int ch) in tx_dma_buf_init() argument
130 int ch_factor = ch * N_DMA_TX_BUF; in tx_dma_buf_init()
139 tx_dma_buf_pt_init(card, ch); in tx_dma_buf_init()
142 static void rx_dma_buf_pt_init(pc300_t * card, int ch) in rx_dma_buf_pt_init() argument
145 int ch_factor = ch * N_DMA_RX_BUF; in rx_dma_buf_pt_init()
157 static void rx_dma_buf_init(pc300_t * card, int ch) in rx_dma_buf_init() argument
160 int ch_factor = ch * N_DMA_RX_BUF; in rx_dma_buf_init()
169 rx_dma_buf_pt_init(card, ch); in rx_dma_buf_init()
172 static void tx_dma_buf_check(pc300_t * card, int ch) in tx_dma_buf_check() argument
176 ucshort first_bd = card->chan[ch].tx_first_bd; in tx_dma_buf_check()
177 ucshort next_bd = card->chan[ch].tx_next_bd; in tx_dma_buf_check()
179 printk("#CH%d: f_bd = %d(0x%08x), n_bd = %d(0x%08x)\n", ch, in tx_dma_buf_check()
180 first_bd, TX_BD_ADDR(ch, first_bd), in tx_dma_buf_check()
181 next_bd, TX_BD_ADDR(ch, next_bd)); in tx_dma_buf_check()
183 ptdescr = (pcsca_bd_t *) (card->hw.rambase + TX_BD_ADDR(ch, first_bd)); in tx_dma_buf_check()
186 ptdescr = (pcsca_bd_t *) (card->hw.rambase + TX_BD_ADDR(ch, i))) { in tx_dma_buf_check()
188 ch, i, (uclong) cpc_readl(&ptdescr->next), in tx_dma_buf_check()
197 static void tx1_dma_buf_check(pc300_t * card, int ch) in tx1_dma_buf_check() argument
201 ucshort first_bd = card->chan[ch].tx_first_bd; in tx1_dma_buf_check()
202 ucshort next_bd = card->chan[ch].tx_next_bd; in tx1_dma_buf_check()
205 printk ("\nnfree_tx_bd = %d \n", card->chan[ch].nfree_tx_bd); in tx1_dma_buf_check()
206 printk("#CH%d: f_bd = %d(0x%08x), n_bd = %d(0x%08x)\n", ch, in tx1_dma_buf_check()
207 first_bd, TX_BD_ADDR(ch, first_bd), in tx1_dma_buf_check()
208 next_bd, TX_BD_ADDR(ch, next_bd)); in tx1_dma_buf_check()
210 (uclong) cpc_readl(scabase + DTX_REG(CDAL, ch)), in tx1_dma_buf_check()
211 (uclong) cpc_readl(scabase + DTX_REG(EDAL, ch))); in tx1_dma_buf_check()
213 ptdescr = (pcsca_bd_t *) (card->hw.rambase + TX_BD_ADDR(ch, i)); in tx1_dma_buf_check()
215 ch, i, (uclong) cpc_readl(&ptdescr->next), in tx1_dma_buf_check()
223 static void rx_dma_buf_check(pc300_t * card, int ch) in rx_dma_buf_check() argument
227 ucshort first_bd = card->chan[ch].rx_first_bd; in rx_dma_buf_check()
228 ucshort last_bd = card->chan[ch].rx_last_bd; in rx_dma_buf_check()
231 ch_factor = ch * N_DMA_RX_BUF; in rx_dma_buf_check()
232 printk("#CH%d: f_bd = %d, l_bd = %d\n", ch, first_bd, last_bd); in rx_dma_buf_check()
238 ch, i, (uclong) cpc_readl(&ptdescr->next), in rx_dma_buf_check()
246 int dma_get_rx_frame_size(pc300_t * card, int ch) in dma_get_rx_frame_size() argument
249 ucshort first_bd = card->chan[ch].rx_first_bd; in dma_get_rx_frame_size()
253 ptdescr = (pcsca_bd_t *)(card->hw.rambase + RX_BD_ADDR(ch, first_bd)); in dma_get_rx_frame_size()
257 if ((status & DST_EOM) || (first_bd == card->chan[ch].rx_last_bd)) { in dma_get_rx_frame_size()
271 int dma_buf_write(pc300_t * card, int ch, ucchar * ptdata, int len) in dma_buf_write() argument
278 if (nbuf >= card->chan[ch].nfree_tx_bd) { in dma_buf_write()
284 TX_BD_ADDR(ch, card->chan[ch].tx_next_bd)); in dma_buf_write()
290 card->chan[ch].nfree_tx_bd--; in dma_buf_write()
301 card->chan[ch].tx_next_bd = in dma_buf_write()
302 (card->chan[ch].tx_next_bd + 1) & (N_DMA_TX_BUF - 1); in dma_buf_write()
312 int dma_buf_read(pc300_t * card, int ch, struct sk_buff *skb) in dma_buf_read() argument
315 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in dma_buf_read()
321 RX_BD_ADDR(ch, chan->rx_first_bd)); in dma_buf_read()
363 cpc_writel(card->hw.scabase + DRX_REG(EDAL, ch), in dma_buf_read()
364 RX_BD_ADDR(ch, chan->rx_last_bd)); in dma_buf_read()
369 void tx_dma_stop(pc300_t * card, int ch) in tx_dma_stop() argument
372 ucchar drr_ena_bit = 1 << (5 + 2 * ch); in tx_dma_stop()
373 ucchar drr_rst_bit = 1 << (1 + 2 * ch); in tx_dma_stop()
380 void rx_dma_stop(pc300_t * card, int ch) in rx_dma_stop() argument
383 ucchar drr_ena_bit = 1 << (4 + 2 * ch); in rx_dma_stop()
384 ucchar drr_rst_bit = 1 << (2 * ch); in rx_dma_stop()
391 void rx_dma_start(pc300_t * card, int ch) in rx_dma_start() argument
394 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in rx_dma_start()
397 cpc_writel(scabase + DRX_REG(CDAL, ch), in rx_dma_start()
398 RX_BD_ADDR(ch, chan->rx_first_bd)); in rx_dma_start()
399 if (cpc_readl(scabase + DRX_REG(CDAL,ch)) != in rx_dma_start()
400 RX_BD_ADDR(ch, chan->rx_first_bd)) { in rx_dma_start()
401 cpc_writel(scabase + DRX_REG(CDAL, ch), in rx_dma_start()
402 RX_BD_ADDR(ch, chan->rx_first_bd)); in rx_dma_start()
404 cpc_writel(scabase + DRX_REG(EDAL, ch), in rx_dma_start()
405 RX_BD_ADDR(ch, chan->rx_last_bd)); in rx_dma_start()
406 cpc_writew(scabase + DRX_REG(BFLL, ch), BD_DEF_LEN); in rx_dma_start()
407 cpc_writeb(scabase + DSR_RX(ch), DSR_DE); in rx_dma_start()
408 if (!(cpc_readb(scabase + DSR_RX(ch)) & DSR_DE)) { in rx_dma_start()
409 cpc_writeb(scabase + DSR_RX(ch), DSR_DE); in rx_dma_start()
416 void falc_issue_cmd(pc300_t * card, int ch, ucchar cmd) in falc_issue_cmd() argument
421 while (cpc_readb(falcbase + F_REG(SIS, ch)) & SIS_CEC) { in falc_issue_cmd()
424 card->chan[ch].d.name, cmd); in falc_issue_cmd()
428 cpc_writeb(falcbase + F_REG(CMDR, ch), cmd); in falc_issue_cmd()
431 void falc_intr_enable(pc300_t * card, int ch) in falc_intr_enable() argument
433 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_intr_enable()
439 cpc_writeb(falcbase + F_REG(IPC, ch), in falc_intr_enable()
440 cpc_readb(falcbase + F_REG(IPC, ch)) & ~IPC_IC0); in falc_intr_enable()
442 cpc_writeb(falcbase + F_REG(FMR1, ch), in falc_intr_enable()
443 cpc_readb(falcbase + F_REG(FMR1, ch)) | FMR1_ECM); in falc_intr_enable()
445 cpc_writeb(falcbase + F_REG(IMR3, ch), in falc_intr_enable()
446 cpc_readb(falcbase + F_REG(IMR3, ch)) & ~(IMR3_SEC | IMR3_ES)); in falc_intr_enable()
448 cpc_writeb(falcbase + F_REG(IMR4, ch), in falc_intr_enable()
449 cpc_readb(falcbase + F_REG(IMR4, ch)) & ~(IMR4_LOS)); in falc_intr_enable()
451 cpc_writeb(falcbase + F_REG(IMR4, ch), in falc_intr_enable()
452 cpc_readb(falcbase + F_REG(IMR4, ch)) & in falc_intr_enable()
456 cpc_writeb(falcbase + F_REG(IMR3, ch), in falc_intr_enable()
457 cpc_readb(falcbase + F_REG(IMR3, ch)) & ~IMR3_LLBSC); in falc_intr_enable()
459 cpc_writeb(falcbase + F_REG(IPC, ch), in falc_intr_enable()
460 cpc_readb(falcbase + F_REG(IPC, ch)) | IPC_SCI); in falc_intr_enable()
462 cpc_writeb(falcbase + F_REG(IMR2, ch), in falc_intr_enable()
463 cpc_readb(falcbase + F_REG(IMR2, ch)) & ~(IMR2_LOS)); in falc_intr_enable()
465 cpc_writeb(falcbase + F_REG(IMR2, ch), in falc_intr_enable()
466 cpc_readb(falcbase + F_REG(IMR2, ch)) & in falc_intr_enable()
469 cpc_writeb(falcbase + F_REG(IMR2, ch), in falc_intr_enable()
470 cpc_readb(falcbase + F_REG(IMR2, ch)) & in falc_intr_enable()
473 cpc_writeb(falcbase + F_REG(IMR2, ch), in falc_intr_enable()
474 cpc_readb(falcbase + F_REG(IMR2, ch)) | in falc_intr_enable()
481 void falc_open_timeslot(pc300_t * card, int ch, int timeslot) in falc_open_timeslot() argument
484 ucchar tshf = card->chan[ch].falc.offset; in falc_open_timeslot()
486 cpc_writeb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch), in falc_open_timeslot()
487 cpc_readb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch)) & in falc_open_timeslot()
489 cpc_writeb(falcbase + F_REG((TTR1 + timeslot / 8), ch), in falc_open_timeslot()
490 cpc_readb(falcbase + F_REG((TTR1 + timeslot / 8), ch)) | in falc_open_timeslot()
492 cpc_writeb(falcbase + F_REG((RTR1 + timeslot / 8), ch), in falc_open_timeslot()
493 cpc_readb(falcbase + F_REG((RTR1 + timeslot / 8), ch)) | in falc_open_timeslot()
497 void falc_close_timeslot(pc300_t * card, int ch, int timeslot) in falc_close_timeslot() argument
500 ucchar tshf = card->chan[ch].falc.offset; in falc_close_timeslot()
502 cpc_writeb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch), in falc_close_timeslot()
503 cpc_readb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch)) | in falc_close_timeslot()
505 cpc_writeb(falcbase + F_REG((TTR1 + timeslot / 8), ch), in falc_close_timeslot()
506 cpc_readb(falcbase + F_REG((TTR1 + timeslot / 8), ch)) & in falc_close_timeslot()
508 cpc_writeb(falcbase + F_REG((RTR1 + timeslot / 8), ch), in falc_close_timeslot()
509 cpc_readb(falcbase + F_REG((RTR1 + timeslot / 8), ch)) & in falc_close_timeslot()
513 void falc_close_all_timeslots(pc300_t * card, int ch) in falc_close_all_timeslots() argument
515 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_close_all_timeslots()
519 cpc_writeb(falcbase + F_REG(ICB1, ch), 0xff); in falc_close_all_timeslots()
520 cpc_writeb(falcbase + F_REG(TTR1, ch), 0); in falc_close_all_timeslots()
521 cpc_writeb(falcbase + F_REG(RTR1, ch), 0); in falc_close_all_timeslots()
522 cpc_writeb(falcbase + F_REG(ICB2, ch), 0xff); in falc_close_all_timeslots()
523 cpc_writeb(falcbase + F_REG(TTR2, ch), 0); in falc_close_all_timeslots()
524 cpc_writeb(falcbase + F_REG(RTR2, ch), 0); in falc_close_all_timeslots()
525 cpc_writeb(falcbase + F_REG(ICB3, ch), 0xff); in falc_close_all_timeslots()
526 cpc_writeb(falcbase + F_REG(TTR3, ch), 0); in falc_close_all_timeslots()
527 cpc_writeb(falcbase + F_REG(RTR3, ch), 0); in falc_close_all_timeslots()
529 cpc_writeb(falcbase + F_REG(ICB4, ch), 0xff); in falc_close_all_timeslots()
530 cpc_writeb(falcbase + F_REG(TTR4, ch), 0); in falc_close_all_timeslots()
531 cpc_writeb(falcbase + F_REG(RTR4, ch), 0); in falc_close_all_timeslots()
535 void falc_open_all_timeslots(pc300_t * card, int ch) in falc_open_all_timeslots() argument
537 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_open_all_timeslots()
541 cpc_writeb(falcbase + F_REG(ICB1, ch), 0); in falc_open_all_timeslots()
543 cpc_writeb(falcbase + F_REG(TTR1, ch), 0xff); in falc_open_all_timeslots()
544 cpc_writeb(falcbase + F_REG(RTR1, ch), 0xff); in falc_open_all_timeslots()
547 cpc_writeb(falcbase + F_REG(TTR1, ch), 0x7f); in falc_open_all_timeslots()
548 cpc_writeb(falcbase + F_REG(RTR1, ch), 0x7f); in falc_open_all_timeslots()
550 cpc_writeb(falcbase + F_REG(ICB2, ch), 0); in falc_open_all_timeslots()
551 cpc_writeb(falcbase + F_REG(TTR2, ch), 0xff); in falc_open_all_timeslots()
552 cpc_writeb(falcbase + F_REG(RTR2, ch), 0xff); in falc_open_all_timeslots()
553 cpc_writeb(falcbase + F_REG(ICB3, ch), 0); in falc_open_all_timeslots()
554 cpc_writeb(falcbase + F_REG(TTR3, ch), 0xff); in falc_open_all_timeslots()
555 cpc_writeb(falcbase + F_REG(RTR3, ch), 0xff); in falc_open_all_timeslots()
557 cpc_writeb(falcbase + F_REG(ICB4, ch), 0); in falc_open_all_timeslots()
558 cpc_writeb(falcbase + F_REG(TTR4, ch), 0xff); in falc_open_all_timeslots()
559 cpc_writeb(falcbase + F_REG(RTR4, ch), 0xff); in falc_open_all_timeslots()
561 cpc_writeb(falcbase + F_REG(ICB4, ch), 0xff); in falc_open_all_timeslots()
562 cpc_writeb(falcbase + F_REG(TTR4, ch), 0x80); in falc_open_all_timeslots()
563 cpc_writeb(falcbase + F_REG(RTR4, ch), 0x80); in falc_open_all_timeslots()
567 void falc_init_timeslot(pc300_t * card, int ch) in falc_init_timeslot() argument
569 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_init_timeslot()
577 falc_open_timeslot(card, ch, tslot + 1); in falc_init_timeslot()
580 falc_close_timeslot(card, ch, tslot + 1); in falc_init_timeslot()
585 void falc_enable_comm(pc300_t * card, int ch) in falc_enable_comm() argument
587 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_enable_comm()
591 falc_open_all_timeslots(card, ch); in falc_enable_comm()
593 falc_init_timeslot(card, ch); in falc_enable_comm()
598 ~((CPLD_REG1_FALC_DCD | CPLD_REG1_FALC_CTS) << (2 * ch))); in falc_enable_comm()
601 void falc_disable_comm(pc300_t * card, int ch) in falc_disable_comm() argument
603 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_disable_comm()
607 falc_close_all_timeslots(card, ch); in falc_disable_comm()
612 ((CPLD_REG1_FALC_DCD | CPLD_REG1_FALC_CTS) << (2 * ch))); in falc_disable_comm()
615 void falc_init_t1(pc300_t * card, int ch) in falc_init_t1() argument
617 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_init_t1()
621 ucchar dja = (ch ? (LIM2_DJA2 | LIM2_DJA1) : 0); in falc_init_t1()
624 cpc_writeb(falcbase + F_REG(FMR1, ch), FMR1_PMOD); in falc_init_t1()
630 cpc_writeb(falcbase + F_REG(SIC1, ch), SIC1_XBS0); in falc_init_t1()
634 cpc_writeb(falcbase + F_REG(LIM0, ch), in falc_init_t1()
635 cpc_readb(falcbase + F_REG(LIM0, ch)) | LIM0_MAS); in falc_init_t1()
637 cpc_writeb(falcbase + F_REG(LIM0, ch), in falc_init_t1()
638 cpc_readb(falcbase + F_REG(LIM0, ch)) & ~LIM0_MAS); in falc_init_t1()
639 cpc_writeb(falcbase + F_REG(LOOP, ch), in falc_init_t1()
640 cpc_readb(falcbase + F_REG(LOOP, ch)) & ~LOOP_RTM); in falc_init_t1()
643 cpc_writeb(falcbase + F_REG(IPC, ch), IPC_SCI); in falc_init_t1()
644 cpc_writeb(falcbase + F_REG(FMR0, ch), in falc_init_t1()
645 cpc_readb(falcbase + F_REG(FMR0, ch)) & in falc_init_t1()
650 cpc_writeb(falcbase + F_REG(FMR0, ch), in falc_init_t1()
651 cpc_readb(falcbase + F_REG(FMR0, ch)) | in falc_init_t1()
654 cpc_writeb(falcbase + F_REG(CCB1, ch), 0xff); in falc_init_t1()
655 cpc_writeb(falcbase + F_REG(CCB2, ch), 0xff); in falc_init_t1()
656 cpc_writeb(falcbase + F_REG(CCB3, ch), 0xff); in falc_init_t1()
660 cpc_writeb(falcbase + F_REG(FMR0, ch), in falc_init_t1()
661 cpc_readb(falcbase + F_REG(FMR0, ch)) | in falc_init_t1()
666 cpc_writeb(falcbase + F_REG(FMR0, ch), in falc_init_t1()
667 cpc_readb(falcbase + F_REG(FMR0, ch)) | 0x00); in falc_init_t1()
671 cpc_writeb(falcbase + F_REG(LIM0, ch), in falc_init_t1()
672 cpc_readb(falcbase + F_REG(LIM0, ch)) | LIM0_ELOS); in falc_init_t1()
673 cpc_writeb(falcbase + F_REG(LIM0, ch), in falc_init_t1()
674 cpc_readb(falcbase + F_REG(LIM0, ch)) & ~(LIM0_SCL1 | LIM0_SCL0)); in falc_init_t1()
676 cpc_writeb(falcbase + F_REG(FMR1, ch), in falc_init_t1()
677 cpc_readb(falcbase + F_REG(FMR1, ch)) | FMR1_IMOD); in falc_init_t1()
682 cpc_writeb(falcbase + F_REG(FMR4, ch), in falc_init_t1()
683 cpc_readb(falcbase + F_REG(FMR4, ch)) | FMR4_FM1); in falc_init_t1()
684 cpc_writeb(falcbase + F_REG(FMR1, ch), in falc_init_t1()
685 cpc_readb(falcbase + F_REG(FMR1, ch)) | in falc_init_t1()
687 cpc_writeb(falcbase + F_REG(XDL1, ch), 0); in falc_init_t1()
688 cpc_writeb(falcbase + F_REG(XDL2, ch), 0); in falc_init_t1()
689 cpc_writeb(falcbase + F_REG(XDL3, ch), 0); in falc_init_t1()
690 cpc_writeb(falcbase + F_REG(FMR0, ch), in falc_init_t1()
691 cpc_readb(falcbase + F_REG(FMR0, ch)) & ~FMR0_SRAF); in falc_init_t1()
692 cpc_writeb(falcbase + F_REG(FMR2, ch), in falc_init_t1()
693 cpc_readb(falcbase + F_REG(FMR2,ch)) | FMR2_MCSP | FMR2_SSP); in falc_init_t1()
698 cpc_writeb(falcbase + F_REG(FMR4, ch), in falc_init_t1()
699 cpc_readb(falcbase + F_REG(FMR4, ch)) & in falc_init_t1()
701 cpc_writeb(falcbase + F_REG(FMR0, ch), in falc_init_t1()
702 cpc_readb(falcbase + F_REG(FMR0, ch)) | FMR0_SRAF); in falc_init_t1()
703 cpc_writeb(falcbase + F_REG(FMR2, ch), in falc_init_t1()
704 cpc_readb(falcbase + F_REG(FMR2, ch)) & ~FMR2_SSP); in falc_init_t1()
709 cpc_writeb(falcbase + F_REG(FMR4, ch), in falc_init_t1()
710 cpc_readb(falcbase + F_REG(FMR4, ch)) | FMR4_AUTO); in falc_init_t1()
713 cpc_writeb(falcbase + F_REG(FMR2, ch), in falc_init_t1()
714 cpc_readb(falcbase + F_REG(FMR2, ch)) | FMR2_AXRA); in falc_init_t1()
717 cpc_writeb(falcbase + F_REG(FMR1, ch), in falc_init_t1()
718 cpc_readb(falcbase + F_REG(FMR1, ch)) | FMR1_CTM); in falc_init_t1()
721 cpc_writeb(falcbase + F_REG(FMR1, ch), in falc_init_t1()
722 cpc_readb(falcbase + F_REG(FMR1, ch)) & ~FMR1_SIGM); in falc_init_t1()
723 cpc_writeb(falcbase + F_REG(FMR5, ch), in falc_init_t1()
724 cpc_readb(falcbase + F_REG(FMR5, ch)) & in falc_init_t1()
726 cpc_writeb(falcbase + F_REG(CCR1, ch), 0); in falc_init_t1()
728 cpc_writeb(falcbase + F_REG(LIM1, ch), in falc_init_t1()
729 cpc_readb(falcbase + F_REG(LIM1, ch)) | LIM1_RIL0 | LIM1_RIL1); in falc_init_t1()
734 cpc_writeb(falcbase + F_REG(LIM2, ch), (LIM2_LOS1 | dja)); in falc_init_t1()
735 cpc_writeb(falcbase + F_REG(XPM0, ch), 0x5a); in falc_init_t1()
736 cpc_writeb(falcbase + F_REG(XPM1, ch), 0x8f); in falc_init_t1()
737 cpc_writeb(falcbase + F_REG(XPM2, ch), 0x20); in falc_init_t1()
740 cpc_writeb(falcbase + F_REG(LIM2, ch), (0x40 | LIM2_LOS1 | dja)); in falc_init_t1()
741 cpc_writeb(falcbase + F_REG(XPM0, ch), 0x11); in falc_init_t1()
742 cpc_writeb(falcbase + F_REG(XPM1, ch), 0x02); in falc_init_t1()
743 cpc_writeb(falcbase + F_REG(XPM2, ch), 0x20); in falc_init_t1()
746 cpc_writeb(falcbase + F_REG(LIM2, ch), (0x80 | LIM2_LOS1 | dja)); in falc_init_t1()
747 cpc_writeb(falcbase + F_REG(XPM0, ch), 0x8e); in falc_init_t1()
748 cpc_writeb(falcbase + F_REG(XPM1, ch), 0x01); in falc_init_t1()
749 cpc_writeb(falcbase + F_REG(XPM2, ch), 0x20); in falc_init_t1()
752 cpc_writeb(falcbase + F_REG(LIM2, ch), (0xc0 | LIM2_LOS1 | dja)); in falc_init_t1()
753 cpc_writeb(falcbase + F_REG(XPM0, ch), 0x09); in falc_init_t1()
754 cpc_writeb(falcbase + F_REG(XPM1, ch), 0x01); in falc_init_t1()
755 cpc_writeb(falcbase + F_REG(XPM2, ch), 0x20); in falc_init_t1()
760 cpc_writeb(falcbase + F_REG(XC0, ch), in falc_init_t1()
761 cpc_readb(falcbase + F_REG(XC0, ch)) | 0x01); in falc_init_t1()
763 cpc_writeb(falcbase + F_REG(XC1, ch), 0x3e); in falc_init_t1()
765 cpc_writeb(falcbase + F_REG(RC0, ch), 0x05); in falc_init_t1()
767 cpc_writeb(falcbase + F_REG(RC1, ch), 0x00); in falc_init_t1()
770 cpc_writeb(falcbase + F_REG(PCDR, ch), 0x0a); in falc_init_t1()
772 cpc_writeb(falcbase + F_REG(PCRR, ch), 0x15); in falc_init_t1()
774 cpc_writeb(falcbase + F_REG(IDLE, ch), 0x7f); in falc_init_t1()
777 cpc_writeb(falcbase + F_REG(RC1, ch), in falc_init_t1()
778 cpc_readb(falcbase + F_REG(RC1, ch)) | 0x80); in falc_init_t1()
781 falc_close_all_timeslots(card, ch); in falc_init_t1()
784 void falc_init_e1(pc300_t * card, int ch) in falc_init_e1() argument
786 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_init_e1()
790 ucchar dja = (ch ? (LIM2_DJA2 | LIM2_DJA1) : 0); in falc_init_e1()
793 cpc_writeb(falcbase + F_REG(FMR1, ch), in falc_init_e1()
794 cpc_readb(falcbase + F_REG(FMR1, ch)) & ~FMR1_PMOD); in falc_init_e1()
798 cpc_writeb(falcbase + F_REG(LIM0, ch), in falc_init_e1()
799 cpc_readb(falcbase + F_REG(LIM0, ch)) | LIM0_MAS); in falc_init_e1()
801 cpc_writeb(falcbase + F_REG(LIM0, ch), in falc_init_e1()
802 cpc_readb(falcbase + F_REG(LIM0, ch)) & ~LIM0_MAS); in falc_init_e1()
804 cpc_writeb(falcbase + F_REG(LOOP, ch), in falc_init_e1()
805 cpc_readb(falcbase + F_REG(LOOP, ch)) & ~LOOP_SFM); in falc_init_e1()
807 cpc_writeb(falcbase + F_REG(IPC, ch), IPC_SCI); in falc_init_e1()
808 cpc_writeb(falcbase + F_REG(FMR0, ch), in falc_init_e1()
809 cpc_readb(falcbase + F_REG(FMR0, ch)) & in falc_init_e1()
814 cpc_writeb(falcbase + F_REG(FMR0, ch), in falc_init_e1()
815 cpc_readb(falcbase + F_REG(FMR0, ch)) | in falc_init_e1()
820 cpc_writeb(falcbase + F_REG(FMR0, ch), in falc_init_e1()
821 cpc_readb(falcbase + F_REG(FMR0, ch)) | in falc_init_e1()
829 cpc_writeb(falcbase + F_REG(LIM0, ch), in falc_init_e1()
830 cpc_readb(falcbase + F_REG(LIM0, ch)) & ~(LIM0_SCL1 | LIM0_SCL0)); in falc_init_e1()
832 cpc_writeb(falcbase + F_REG(FMR1, ch), in falc_init_e1()
833 cpc_readb(falcbase + F_REG(FMR1, ch)) | FMR1_IMOD); in falc_init_e1()
835 cpc_writeb(falcbase + F_REG(XPM0, ch), 0x18); in falc_init_e1()
836 cpc_writeb(falcbase + F_REG(XPM1, ch), 0x03); in falc_init_e1()
837 cpc_writeb(falcbase + F_REG(XPM2, ch), 0x00); in falc_init_e1()
842 cpc_writeb(falcbase + F_REG(FMR1, ch), in falc_init_e1()
843 cpc_readb(falcbase + F_REG(FMR1, ch)) | FMR1_XFS); in falc_init_e1()
844 cpc_writeb(falcbase + F_REG(FMR2, ch), in falc_init_e1()
845 cpc_readb(falcbase + F_REG(FMR2, ch)) | FMR2_RFS1); in falc_init_e1()
846 cpc_writeb(falcbase + F_REG(FMR2, ch), in falc_init_e1()
847 cpc_readb(falcbase + F_REG(FMR2, ch)) & ~FMR2_RFS0); in falc_init_e1()
848 cpc_writeb(falcbase + F_REG(FMR3, ch), in falc_init_e1()
849 cpc_readb(falcbase + F_REG(FMR3, ch)) & ~FMR3_EXTIW); in falc_init_e1()
852 cpc_writeb(falcbase + F_REG(FMR1, ch), in falc_init_e1()
853 cpc_readb(falcbase + F_REG(FMR1, ch)) | FMR1_MFCS); in falc_init_e1()
856 cpc_writeb(falcbase + F_REG(FMR2, ch), in falc_init_e1()
857 cpc_readb(falcbase + F_REG(FMR2, ch)) | FMR2_ALMF); in falc_init_e1()
860 cpc_writeb(falcbase + F_REG(XSP, ch), in falc_init_e1()
861 cpc_readb(falcbase + F_REG(XSP, ch)) & ~XSP_AXS); in falc_init_e1()
862 cpc_writeb(falcbase + F_REG(XSP, ch), in falc_init_e1()
863 cpc_readb(falcbase + F_REG(XSP, ch)) | XSP_EBP); in falc_init_e1()
864 cpc_writeb(falcbase + F_REG(XSP, ch), in falc_init_e1()
865 cpc_readb(falcbase + F_REG(XSP, ch)) | XSP_XS13 | XSP_XS15); in falc_init_e1()
868 cpc_writeb(falcbase + F_REG(FMR1, ch), in falc_init_e1()
869 cpc_readb(falcbase + F_REG(FMR1, ch)) | FMR1_AFR); in falc_init_e1()
872 cpc_writeb(falcbase + F_REG(FMR2, ch), in falc_init_e1()
873 cpc_readb(falcbase + F_REG(FMR2, ch)) | FMR2_AXRA); in falc_init_e1()
876 cpc_writeb(falcbase + F_REG(XSW, ch), in falc_init_e1()
877 cpc_readb(falcbase + F_REG(XSW, ch)) | in falc_init_e1()
884 cpc_writeb(falcbase + F_REG(FMR1, ch), in falc_init_e1()
885 cpc_readb(falcbase + F_REG(FMR1, ch)) & ~FMR1_XFS); in falc_init_e1()
886 cpc_writeb(falcbase + F_REG(FMR2, ch), in falc_init_e1()
887 cpc_readb(falcbase + F_REG(FMR2, ch)) & in falc_init_e1()
889 cpc_writeb(falcbase + F_REG(XSW, ch), in falc_init_e1()
890 cpc_readb(falcbase + F_REG(XSW, ch)) | XSW_XSIS); in falc_init_e1()
891 cpc_writeb(falcbase + F_REG(XSP, ch), in falc_init_e1()
892 cpc_readb(falcbase + F_REG(XSP, ch)) | XSP_XSIF); in falc_init_e1()
895 cpc_writeb(falcbase + F_REG(FMR1, ch), in falc_init_e1()
896 cpc_readb(falcbase + F_REG(FMR1, ch)) | FMR1_AFR); in falc_init_e1()
899 cpc_writeb(falcbase + F_REG(FMR2, ch), in falc_init_e1()
900 cpc_readb(falcbase + F_REG(FMR2, ch)) | FMR2_AXRA); in falc_init_e1()
903 cpc_writeb(falcbase + F_REG(XSW, ch), in falc_init_e1()
904 cpc_readb(falcbase + F_REG(XSW, ch)) | in falc_init_e1()
910 cpc_writeb(falcbase + F_REG(FMR1, ch), in falc_init_e1()
911 cpc_readb(falcbase + F_REG(FMR1, ch)) & ~FMR1_XFS); in falc_init_e1()
912 cpc_writeb(falcbase + F_REG(FMR2, ch), in falc_init_e1()
913 cpc_readb(falcbase + F_REG(FMR2, ch)) & in falc_init_e1()
915 cpc_writeb(falcbase + F_REG(XSP, ch), in falc_init_e1()
916 cpc_readb(falcbase + F_REG(XSP, ch)) | XSP_TT0); in falc_init_e1()
917 cpc_writeb(falcbase + F_REG(XSW, ch), in falc_init_e1()
918 cpc_readb(falcbase + F_REG(XSW, ch)) & in falc_init_e1()
920 cpc_writeb(falcbase + F_REG(TSWM, ch), 0xff); in falc_init_e1()
921 cpc_writeb(falcbase + F_REG(FMR2, ch), in falc_init_e1()
922 cpc_readb(falcbase + F_REG(FMR2, ch)) | in falc_init_e1()
924 cpc_writeb(falcbase + F_REG(FMR2, ch), in falc_init_e1()
925 cpc_readb(falcbase + F_REG(FMR2, ch)) & ~FMR2_AXRA); in falc_init_e1()
926 cpc_writeb(falcbase + F_REG(FMR1, ch), in falc_init_e1()
927 cpc_readb(falcbase + F_REG(FMR1, ch)) & ~FMR1_AFR); in falc_init_e1()
931 (CPLD_REG2_FALC_LED2 << (2 * ch))); in falc_init_e1()
936 cpc_writeb(falcbase + F_REG(XSP, ch), in falc_init_e1()
937 cpc_readb(falcbase + F_REG(XSP, ch)) & ~XSP_CASEN); in falc_init_e1()
938 cpc_writeb(falcbase + F_REG(CCR1, ch), 0); in falc_init_e1()
940 cpc_writeb(falcbase + F_REG(LIM1, ch), in falc_init_e1()
941 cpc_readb(falcbase + F_REG(LIM1, ch)) | LIM1_RIL0 | LIM1_RIL1); in falc_init_e1()
942 cpc_writeb(falcbase + F_REG(LIM2, ch), (LIM2_LOS1 | dja)); in falc_init_e1()
945 cpc_writeb(falcbase + F_REG(XC0, ch), in falc_init_e1()
946 cpc_readb(falcbase + F_REG(XC0, ch)) | 0x01); in falc_init_e1()
948 cpc_writeb(falcbase + F_REG(XC1, ch), 0x3e); in falc_init_e1()
950 cpc_writeb(falcbase + F_REG(RC0, ch), 0x05); in falc_init_e1()
952 cpc_writeb(falcbase + F_REG(RC1, ch), 0x00); in falc_init_e1()
955 cpc_writeb(falcbase + F_REG(PCDR, ch), 0x0a); in falc_init_e1()
957 cpc_writeb(falcbase + F_REG(PCRR, ch), 0x15); in falc_init_e1()
959 cpc_writeb(falcbase + F_REG(IDLE, ch), 0x7f); in falc_init_e1()
961 falc_close_all_timeslots(card, ch); in falc_init_e1()
964 void falc_init_hdlc(pc300_t * card, int ch) in falc_init_hdlc() argument
967 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_init_hdlc()
972 cpc_writeb(falcbase + F_REG(MODE, ch), 0); in falc_init_hdlc()
974 cpc_writeb(falcbase + F_REG(MODE, ch), in falc_init_hdlc()
975 cpc_readb(falcbase + F_REG(MODE, ch)) | in falc_init_hdlc()
977 cpc_writeb(falcbase + F_REG(RAH2, ch), 0xff); in falc_init_hdlc()
978 cpc_writeb(falcbase + F_REG(RAH1, ch), 0xff); in falc_init_hdlc()
979 cpc_writeb(falcbase + F_REG(RAL2, ch), 0xff); in falc_init_hdlc()
980 cpc_writeb(falcbase + F_REG(RAL1, ch), 0xff); in falc_init_hdlc()
984 falc_issue_cmd(card, ch, CMDR_RRES | CMDR_XRES | CMDR_SRES); in falc_init_hdlc()
987 falc_intr_enable(card, ch); in falc_init_hdlc()
990 void te_config(pc300_t * card, int ch) in te_config() argument
992 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in te_config()
1019 (CPLD_REG1_FALC_RESET << (2 * ch))); in te_config()
1023 ~(CPLD_REG1_FALC_RESET << (2 * ch))); in te_config()
1026 falc_init_t1(card, ch); in te_config()
1028 falc_init_e1(card, ch); in te_config()
1030 falc_init_hdlc(card, ch); in te_config()
1032 cpc_writeb(falcbase + F_REG(LIM0, ch), in te_config()
1033 cpc_readb(falcbase + F_REG(LIM0, ch)) & ~LIM0_EQON); in te_config()
1035 cpc_writeb(falcbase + F_REG(LIM0, ch), in te_config()
1036 cpc_readb(falcbase + F_REG(LIM0, ch)) | LIM0_EQON); in te_config()
1040 ((CPLD_REG2_FALC_TX_CLK | CPLD_REG2_FALC_RX_CLK) << (2 * ch))); in te_config()
1043 dummy = cpc_readb(falcbase + F_REG(FISR0, ch)) + in te_config()
1044 cpc_readb(falcbase + F_REG(FISR1, ch)) + in te_config()
1045 cpc_readb(falcbase + F_REG(FISR2, ch)) + in te_config()
1046 cpc_readb(falcbase + F_REG(FISR3, ch)); in te_config()
1050 void falc_check_status(pc300_t * card, int ch, unsigned char frs0) in falc_check_status() argument
1052 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_check_status()
1067 cpc_writeb(falcbase + F_REG(IMR0, ch), in falc_check_status()
1068 cpc_readb(falcbase + F_REG(IMR0, ch)) in falc_check_status()
1071 falc_disable_comm(card, ch); in falc_check_status()
1091 cpc_writeb(falcbase + F_REG(IMR0, ch), in falc_check_status()
1092 cpc_readb(falcbase + F_REG(IMR0, ch)) | IMR0_PDEN); in falc_check_status()
1094 falc_disable_comm(card, ch); in falc_check_status()
1111 cpc_writeb(falcbase + F_REG(IMR0, ch), in falc_check_status()
1112 cpc_readb(falcbase + F_REG(IMR0, ch)) in falc_check_status()
1115 falc_disable_comm(card, ch); in falc_check_status()
1138 cpc_writeb(falcbase + F_REG(IMR0, ch), in falc_check_status()
1139 cpc_readb(falcbase + F_REG(IMR0, ch)) in falc_check_status()
1142 falc_disable_comm(card, ch); in falc_check_status()
1157 falc_disable_comm(card, ch); in falc_check_status()
1173 ~(CPLD_REG2_FALC_LED2 << (2 * ch))); in falc_check_status()
1181 (CPLD_REG2_FALC_LED2 << (2 * ch))); in falc_check_status()
1192 cpc_writeb(falcbase + F_REG(IMR0, ch), in falc_check_status()
1193 cpc_readb(falcbase + F_REG(IMR0, ch)) & ~IMR0_PDEN); in falc_check_status()
1195 falc_enable_comm(card, ch); in falc_check_status()
1206 void falc_update_stats(pc300_t * card, int ch) in falc_update_stats() argument
1208 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_update_stats()
1214 counter = cpc_readb(falcbase + F_REG(FECL, ch)); in falc_update_stats()
1215 counter |= cpc_readb(falcbase + F_REG(FECH, ch)) << 8; in falc_update_stats()
1218 counter = cpc_readb(falcbase + F_REG(CVCL, ch)); in falc_update_stats()
1219 counter |= cpc_readb(falcbase + F_REG(CVCH, ch)) << 8; in falc_update_stats()
1222 counter = cpc_readb(falcbase + F_REG(CECL, ch)); in falc_update_stats()
1223 counter |= cpc_readb(falcbase + F_REG(CECH, ch)) << 8; in falc_update_stats()
1226 counter = cpc_readb(falcbase + F_REG(EBCL, ch)); in falc_update_stats()
1227 counter |= cpc_readb(falcbase + F_REG(EBCH, ch)) << 8; in falc_update_stats()
1230 if (cpc_readb(falcbase + F_REG(LCR1, ch)) & LCR1_EPRM) { in falc_update_stats()
1232 counter = cpc_readb(falcbase + F_REG(BECL, ch)); in falc_update_stats()
1233 counter |= cpc_readb(falcbase + F_REG(BECH, ch)) << 8; in falc_update_stats()
1237 (cpc_readb(falcbase + F_REG(FRS1, ch)) & FRS1_LLBAD) && in falc_update_stats()
1238 (!(cpc_readb(falcbase + F_REG(FRS1, ch)) & FRS1_PDEN))) in falc_update_stats()
1241 (cpc_readb(falcbase + F_REG(RSP, ch)) & RSP_LLBAD))) { in falc_update_stats()
1259 void falc_remote_loop(pc300_t * card, int ch, int loop_on) in falc_remote_loop() argument
1261 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_remote_loop()
1271 cpc_writeb(falcbase + F_REG(IMR0, ch), in falc_remote_loop()
1272 cpc_readb(falcbase + F_REG(IMR0, ch)) | IMR0_PDEN); in falc_remote_loop()
1274 falc_disable_comm(card, ch); in falc_remote_loop()
1276 cpc_writeb(falcbase + F_REG(LIM1, ch), in falc_remote_loop()
1277 cpc_readb(falcbase + F_REG(LIM1, ch)) | LIM1_RL); in falc_remote_loop()
1280 cpc_writeb(falcbase + F_REG(LIM1, ch), in falc_remote_loop()
1281 cpc_readb(falcbase + F_REG(LIM1, ch)) & ~LIM1_RL); in falc_remote_loop()
1285 ~(CPLD_REG2_FALC_LED2 << (2 * ch))); in falc_remote_loop()
1287 falc_issue_cmd(card, ch, CMDR_XRES); in falc_remote_loop()
1304 void falc_local_loop(pc300_t * card, int ch, int loop_on) in falc_local_loop() argument
1306 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_local_loop()
1311 cpc_writeb(falcbase + F_REG(LIM0, ch), in falc_local_loop()
1312 cpc_readb(falcbase + F_REG(LIM0, ch)) | LIM0_LL); in falc_local_loop()
1315 cpc_writeb(falcbase + F_REG(LIM0, ch), in falc_local_loop()
1316 cpc_readb(falcbase + F_REG(LIM0, ch)) & ~LIM0_LL); in falc_local_loop()
1331 void falc_payload_loop(pc300_t * card, int ch, int loop_on) in falc_payload_loop() argument
1333 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_payload_loop()
1343 cpc_writeb(falcbase + F_REG(IMR0, ch), in falc_payload_loop()
1344 cpc_readb(falcbase + F_REG(IMR0, ch)) | IMR0_PDEN); in falc_payload_loop()
1346 falc_disable_comm(card, ch); in falc_payload_loop()
1348 cpc_writeb(falcbase + F_REG(FMR2, ch), in falc_payload_loop()
1349 cpc_readb(falcbase + F_REG(FMR2, ch)) | FMR2_PLB); in falc_payload_loop()
1351 cpc_writeb(falcbase + F_REG(FMR4, ch), in falc_payload_loop()
1352 cpc_readb(falcbase + F_REG(FMR4, ch)) | FMR4_TM); in falc_payload_loop()
1354 cpc_writeb(falcbase + F_REG(FMR5, ch), in falc_payload_loop()
1355 cpc_readb(falcbase + F_REG(FMR5, ch)) | XSP_TT0); in falc_payload_loop()
1357 falc_open_all_timeslots(card, ch); in falc_payload_loop()
1360 cpc_writeb(falcbase + F_REG(FMR2, ch), in falc_payload_loop()
1361 cpc_readb(falcbase + F_REG(FMR2, ch)) & ~FMR2_PLB); in falc_payload_loop()
1363 cpc_writeb(falcbase + F_REG(FMR4, ch), in falc_payload_loop()
1364 cpc_readb(falcbase + F_REG(FMR4, ch)) & ~FMR4_TM); in falc_payload_loop()
1366 cpc_writeb(falcbase + F_REG(FMR5, ch), in falc_payload_loop()
1367 cpc_readb(falcbase + F_REG(FMR5, ch)) & ~XSP_TT0); in falc_payload_loop()
1372 ~(CPLD_REG2_FALC_LED2 << (2 * ch))); in falc_payload_loop()
1374 falc_issue_cmd(card, ch, CMDR_XRES); in falc_payload_loop()
1385 void turn_off_xlu(pc300_t * card, int ch) in turn_off_xlu() argument
1387 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in turn_off_xlu()
1392 cpc_writeb(falcbase + F_REG(FMR5, ch), in turn_off_xlu()
1393 cpc_readb(falcbase + F_REG(FMR5, ch)) & ~FMR5_XLU); in turn_off_xlu()
1395 cpc_writeb(falcbase + F_REG(FMR3, ch), in turn_off_xlu()
1396 cpc_readb(falcbase + F_REG(FMR3, ch)) & ~FMR3_XLU); in turn_off_xlu()
1406 void turn_off_xld(pc300_t * card, int ch) in turn_off_xld() argument
1408 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in turn_off_xld()
1413 cpc_writeb(falcbase + F_REG(FMR5, ch), in turn_off_xld()
1414 cpc_readb(falcbase + F_REG(FMR5, ch)) & ~FMR5_XLD); in turn_off_xld()
1416 cpc_writeb(falcbase + F_REG(FMR3, ch), in turn_off_xld()
1417 cpc_readb(falcbase + F_REG(FMR3, ch)) & ~FMR3_XLD); in turn_off_xld()
1428 void falc_generate_loop_up_code(pc300_t * card, int ch) in falc_generate_loop_up_code() argument
1430 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_generate_loop_up_code()
1436 cpc_writeb(falcbase + F_REG(FMR5, ch), in falc_generate_loop_up_code()
1437 cpc_readb(falcbase + F_REG(FMR5, ch)) | FMR5_XLU); in falc_generate_loop_up_code()
1439 cpc_writeb(falcbase + F_REG(FMR3, ch), in falc_generate_loop_up_code()
1440 cpc_readb(falcbase + F_REG(FMR3, ch)) | FMR3_XLU); in falc_generate_loop_up_code()
1446 cpc_writeb(falcbase + F_REG(IMR0, ch), in falc_generate_loop_up_code()
1447 cpc_readb(falcbase + F_REG(IMR0, ch)) | IMR0_PDEN); in falc_generate_loop_up_code()
1449 falc_disable_comm(card, ch); in falc_generate_loop_up_code()
1461 void falc_generate_loop_down_code(pc300_t * card, int ch) in falc_generate_loop_down_code() argument
1463 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_generate_loop_down_code()
1469 cpc_writeb(falcbase + F_REG(FMR5, ch), in falc_generate_loop_down_code()
1470 cpc_readb(falcbase + F_REG(FMR5, ch)) | FMR5_XLD); in falc_generate_loop_down_code()
1472 cpc_writeb(falcbase + F_REG(FMR3, ch), in falc_generate_loop_down_code()
1473 cpc_readb(falcbase + F_REG(FMR3, ch)) | FMR3_XLD); in falc_generate_loop_down_code()
1478 ~(CPLD_REG2_FALC_LED2 << (2 * ch))); in falc_generate_loop_down_code()
1491 void falc_pattern_test(pc300_t * card, int ch, unsigned int activate) in falc_pattern_test() argument
1493 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_pattern_test()
1503 cpc_writeb(falcbase + F_REG(IMR3, ch), in falc_pattern_test()
1504 cpc_readb(falcbase + F_REG(IMR3, ch)) | IMR3_LLBSC); in falc_pattern_test()
1507 cpc_writeb(falcbase + F_REG(IMR1, ch), in falc_pattern_test()
1508 cpc_readb(falcbase + F_REG(IMR1, ch)) | IMR1_LLBSC); in falc_pattern_test()
1512 cpc_writeb(falcbase + F_REG(LCR1, ch), in falc_pattern_test()
1513 cpc_readb(falcbase + F_REG(LCR1, ch)) | LCR1_EPRM | LCR1_XPRBS); in falc_pattern_test()
1518 cpc_writeb(falcbase + F_REG(LCR1, ch), in falc_pattern_test()
1519 cpc_readb(falcbase+F_REG(LCR1,ch)) & ~(LCR1_EPRM | LCR1_XPRBS)); in falc_pattern_test()
1522 cpc_writeb(falcbase + F_REG(IMR3, ch), in falc_pattern_test()
1523 cpc_readb(falcbase + F_REG(IMR3, ch)) & ~IMR3_LLBSC); in falc_pattern_test()
1526 cpc_writeb(falcbase + F_REG(IMR1, ch), in falc_pattern_test()
1527 cpc_readb(falcbase + F_REG(IMR1, ch)) & ~IMR1_LLBSC); in falc_pattern_test()
1538 ucshort falc_pattern_test_error(pc300_t * card, int ch) in falc_pattern_test_error() argument
1540 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_pattern_test_error()
1584 int ch = chan->channel; in cpc_tx_timeout() local
1599 ~(CPLD_REG2_FALC_LED1 << (2 * ch))); in cpc_tx_timeout()
1612 int ch = chan->channel; in cpc_queue_xmit() local
1628 } else if (cpc_readb(card->hw.scabase + M_REG(ST3, ch)) & ST3_DCD) { in cpc_queue_xmit()
1635 cpc_writeb(card->hw.scabase + M_REG(CMD, ch), CMD_TX_BUF_CLR); in cpc_queue_xmit()
1639 ~(CPLD_REG2_FALC_LED1 << (2 * ch))); in cpc_queue_xmit()
1647 if (dma_buf_write(card, ch, (ucchar *) skb->data, skb->len) != 0) { in cpc_queue_xmit()
1670 if (card->chan[ch].nfree_tx_bd <= 1) { in cpc_queue_xmit()
1674 cpc_writel(card->hw.scabase + DTX_REG(EDAL, ch), in cpc_queue_xmit()
1675 TX_BD_ADDR(ch, chan->tx_next_bd)); in cpc_queue_xmit()
1676 cpc_writeb(card->hw.scabase + M_REG(CMD, ch), CMD_TX_ENA); in cpc_queue_xmit()
1677 cpc_writeb(card->hw.scabase + DSR_TX(ch), DSR_DE); in cpc_queue_xmit()
1681 (CPLD_REG2_FALC_LED1 << (2 * ch))); in cpc_queue_xmit()
1696 int ch = chan->channel; in cpc_net_rx() local
1704 if ((rxb = dma_get_rx_frame_size(card, ch)) == -1) in cpc_net_rx()
1725 if (((rxb = dma_buf_read(card, ch, skb)) <= 0) || (skb == NULL)) { in cpc_net_rx()
1782 int ch = chan->channel; in sca_tx_intr() local
1788 TX_BD_ADDR(ch,chan->tx_first_bd)); in sca_tx_intr()
1789 while ((cpc_readl(card->hw.scabase + DTX_REG(CDAL,ch)) != in sca_tx_intr()
1790 TX_BD_ADDR(ch,chan->tx_first_bd)) && in sca_tx_intr()
1799 TX_BD_ADDR(ch,chan->tx_first_bd)); in sca_tx_intr()
1818 int ch; in sca_intr() local
1823 for (ch = 0; ch < card->hw.nchan; ch++) { in sca_intr()
1824 pc300ch_t *chan = &card->chan[ch]; in sca_intr()
1832 if (status & IR0_DRX((IR0_DMIA | IR0_DMIB), ch)) { in sca_intr()
1833 ucchar drx_stat = cpc_readb(scabase + DSR_RX(ch)); in sca_intr()
1836 cpc_writeb(scabase + DSR_RX(ch), drx_stat | DSR_DWE); in sca_intr()
1840 ch, status, drx_stat); in sca_intr()
1842 if (status & IR0_DRX(IR0_DMIA, ch)) { in sca_intr()
1847 if ((cpc_readb(scabase + DSR_RX(ch)) & DSR_DE)) { in sca_intr()
1848 rx_dma_stop(card, ch); in sca_intr()
1851 rx_dma_start(card, ch); in sca_intr()
1855 if ((cpc_readb(scabase + DSR_RX(ch)) & DSR_DE)) { in sca_intr()
1856 rx_dma_stop(card, ch); in sca_intr()
1864 rx_dma_start(card, ch); in sca_intr()
1868 if (status & IR0_DRX(IR0_DMIB, ch)) { in sca_intr()
1875 (CPLD_REG2_FALC_LED1 << (2 * ch))); in sca_intr()
1892 ~ (CPLD_REG2_FALC_LED1 << (2 * ch))); in sca_intr()
1896 if (!(dsr_rx = cpc_readb(scabase + DSR_RX(ch)) & DSR_DE)) { in sca_intr()
1899 dev->name, ch, status, drx_stat, dsr_rx); in sca_intr()
1901 cpc_writeb(scabase + DSR_RX(ch), (dsr_rx | DSR_DE) & 0xfe); in sca_intr()
1906 if (status & IR0_DTX((IR0_EFT | IR0_DMIA | IR0_DMIB), ch)) { in sca_intr()
1907 ucchar dtx_stat = cpc_readb(scabase + DSR_TX(ch)); in sca_intr()
1910 cpc_writeb(scabase + DSR_TX(ch), dtx_stat | DSR_DWE); in sca_intr()
1914 ch, status, dtx_stat); in sca_intr()
1916 if (status & IR0_DTX(IR0_EFT, ch)) { in sca_intr()
1918 if (cpc_readb (scabase + M_REG(TBN, ch)) != 0) { in sca_intr()
1919 cpc_writeb(scabase + M_REG(CMD,ch), CMD_TX_BUF_CLR); in sca_intr()
1925 ~ (CPLD_REG2_FALC_LED1 << (2 * ch))); in sca_intr()
1932 if (status & IR0_DTX(IR0_DMIA, ch)) { in sca_intr()
1936 if (status & IR0_DTX(IR0_DMIB, ch)) { in sca_intr()
1942 ~ (CPLD_REG2_FALC_LED1 << (2 * ch))); in sca_intr()
1950 if (status & IR0_M(IR0_RXINTA, ch)) { in sca_intr()
1951 ucchar st1 = cpc_readb(scabase + M_REG(ST1, ch)); in sca_intr()
1954 cpc_writeb(scabase + M_REG(ST1, ch), st1); in sca_intr()
1958 ch, status, st1); in sca_intr()
1961 if (cpc_readb(scabase + M_REG(ST3, ch)) & ST3_DCD) { in sca_intr()
1972 card->chan[ch].d.line_off++; in sca_intr()
1981 card->chan[ch].d.line_on++; in sca_intr()
1993 static void falc_t1_loop_detection(pc300_t * card, int ch, ucchar frs1) in falc_t1_loop_detection() argument
1995 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_t1_loop_detection()
1999 if (((cpc_readb(falcbase + F_REG(LCR1, ch)) & LCR1_XPRBS) == 0) && in falc_t1_loop_detection()
2004 falc_remote_loop(card, ch, 0); in falc_t1_loop_detection()
2008 ((cpc_readb(falcbase + F_REG(LCR1, ch)) & LCR1_EPRM) == 0)) { in falc_t1_loop_detection()
2011 falc_remote_loop(card, ch, 1); in falc_t1_loop_detection()
2018 static void falc_e1_loop_detection(pc300_t * card, int ch, ucchar rsp) in falc_e1_loop_detection() argument
2020 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_e1_loop_detection()
2024 if (((cpc_readb(falcbase + F_REG(LCR1, ch)) & LCR1_XPRBS) == 0) && in falc_e1_loop_detection()
2029 falc_remote_loop(card, ch, 0); in falc_e1_loop_detection()
2033 ((cpc_readb(falcbase + F_REG(LCR1, ch)) & LCR1_EPRM) == 0)) { in falc_e1_loop_detection()
2036 falc_remote_loop(card, ch, 1); in falc_e1_loop_detection()
2043 static void falc_t1_intr(pc300_t * card, int ch) in falc_t1_intr() argument
2045 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_t1_intr()
2051 while ((gis = cpc_readb(falcbase + F_REG(GIS, ch))) != 0) { in falc_t1_intr()
2053 isr0 = cpc_readb(falcbase + F_REG(FISR0, ch)); in falc_t1_intr()
2056 if (cpc_readb(falcbase + F_REG(FRS1, ch)) & in falc_t1_intr()
2064 dummy = cpc_readb(falcbase + F_REG(FISR1, ch)); in falc_t1_intr()
2068 dummy = cpc_readb(falcbase + F_REG(FISR2, ch)); in falc_t1_intr()
2072 isr3 = cpc_readb(falcbase + F_REG(FISR3, ch)); in falc_t1_intr()
2075 falc_update_stats(card, ch); in falc_t1_intr()
2076 falc_check_status(card, ch, in falc_t1_intr()
2077 cpc_readb(falcbase + F_REG(FRS0, ch))); in falc_t1_intr()
2083 falc_t1_loop_detection(card, ch, in falc_t1_intr()
2084 cpc_readb(falcbase + F_REG(FRS1, ch))); in falc_t1_intr()
2090 static void falc_e1_intr(pc300_t * card, int ch) in falc_e1_intr() argument
2092 pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; in falc_e1_intr()
2098 while ((gis = cpc_readb(falcbase + F_REG(GIS, ch))) != 0) { in falc_e1_intr()
2099 rsp = cpc_readb(falcbase + F_REG(RSP, ch)); in falc_e1_intr()
2102 dummy = cpc_readb(falcbase + F_REG(FISR0, ch)); in falc_e1_intr()
2105 isr1 = cpc_readb(falcbase + F_REG(FISR1, ch)); in falc_e1_intr()
2109 if (cpc_readb (falcbase + F_REG(FRS0, ch)) & in falc_e1_intr()
2111 cpc_writeb(falcbase + F_REG(XSP, ch), in falc_e1_intr()
2112 cpc_readb(falcbase + F_REG(XSP, ch)) in falc_e1_intr()
2115 cpc_writeb(falcbase + F_REG(XSP, ch), in falc_e1_intr()
2116 cpc_readb(falcbase + F_REG(XSP, ch)) in falc_e1_intr()
2121 cpc_writeb(falcbase + F_REG(IMR1, ch), in falc_e1_intr()
2122 cpc_readb(falcbase + F_REG(IMR1, ch)) | IMR1_XMB); in falc_e1_intr()
2125 falc_e1_loop_detection(card, ch, rsp); in falc_e1_intr()
2129 isr2 = cpc_readb(falcbase + F_REG(FISR2, ch)); in falc_e1_intr()
2131 cpc_writeb(falcbase + F_REG(XSW, ch), in falc_e1_intr()
2132 cpc_readb(falcbase + F_REG(XSW, ch)) | XSW_XRA); in falc_e1_intr()
2135 cpc_writeb(falcbase + F_REG(XSW, ch), in falc_e1_intr()
2136 cpc_readb(falcbase + F_REG(XSW, ch)) & ~XSW_XRA); in falc_e1_intr()
2140 cpc_writeb(falcbase + F_REG(IMR1, ch), in falc_e1_intr()
2141 cpc_readb(falcbase + F_REG(IMR1, ch)) & ~IMR1_XMB); in falc_e1_intr()
2145 isr3 = cpc_readb(falcbase + F_REG(FISR3, ch)); in falc_e1_intr()
2148 falc_update_stats(card, ch); in falc_e1_intr()
2149 falc_check_status(card, ch, in falc_e1_intr()
2150 cpc_readb(falcbase + F_REG(FRS0, ch))); in falc_e1_intr()
2161 int ch; in falc_intr() local
2163 for (ch = 0; ch < card->hw.nchan; ch++) { in falc_intr()
2164 pc300ch_t *chan = &card->chan[ch]; in falc_intr()
2168 falc_t1_intr(card, ch); in falc_intr()
2170 falc_e1_intr(card, ch); in falc_intr()
2214 void cpc_sca_status(pc300_t * card, int ch) in cpc_sca_status() argument
2220 tx_dma_buf_check(card, ch); in cpc_sca_status()
2221 rx_dma_buf_check(card, ch); in cpc_sca_status()
2227 (uclong) cpc_readl(scabase + DTX_REG(CDAL, ch)), in cpc_sca_status()
2228 (uclong) cpc_readl(scabase + DTX_REG(EDAL, ch))); in cpc_sca_status()
2230 (uclong) cpc_readl(scabase + DRX_REG(CDAL, ch)), in cpc_sca_status()
2231 (uclong) cpc_readl(scabase + DRX_REG(EDAL, ch)), in cpc_sca_status()
2232 cpc_readw(scabase + DRX_REG(BFLL, ch))); in cpc_sca_status()
2234 cpc_readb(scabase + DMER), cpc_readb(scabase + DSR_TX(ch)), in cpc_sca_status()
2235 cpc_readb(scabase + DSR_RX(ch))); in cpc_sca_status()
2237 cpc_readb(scabase + DMR_TX(ch)), cpc_readb(scabase + DMR_RX(ch)), in cpc_sca_status()
2238 cpc_readb(scabase + DIR_TX(ch)), in cpc_sca_status()
2239 cpc_readb(scabase + DIR_RX(ch))); in cpc_sca_status()
2241 cpc_readb(scabase + DCR_TX(ch)), cpc_readb(scabase + DCR_RX(ch)), in cpc_sca_status()
2242 cpc_readb(scabase + FCT_TX(ch)), in cpc_sca_status()
2243 cpc_readb(scabase + FCT_RX(ch))); in cpc_sca_status()
2245 cpc_readb(scabase + M_REG(MD0, ch)), in cpc_sca_status()
2246 cpc_readb(scabase + M_REG(MD1, ch)), in cpc_sca_status()
2247 cpc_readb(scabase + M_REG(MD2, ch)), in cpc_sca_status()
2248 cpc_readb(scabase + M_REG(MD3, ch)), in cpc_sca_status()
2249 cpc_readb(scabase + M_REG(IDL, ch))); in cpc_sca_status()
2251 cpc_readb(scabase + M_REG(CMD, ch)), in cpc_sca_status()
2252 cpc_readb(scabase + M_REG(SA0, ch)), in cpc_sca_status()
2253 cpc_readb(scabase + M_REG(SA1, ch)), in cpc_sca_status()
2254 cpc_readb(scabase + M_REG(TFN, ch)), in cpc_sca_status()
2255 cpc_readb(scabase + M_REG(CTL, ch))); in cpc_sca_status()
2257 cpc_readb(scabase + M_REG(ST0, ch)), in cpc_sca_status()
2258 cpc_readb(scabase + M_REG(ST1, ch)), in cpc_sca_status()
2259 cpc_readb(scabase + M_REG(ST2, ch)), in cpc_sca_status()
2260 cpc_readb(scabase + M_REG(ST3, ch)), in cpc_sca_status()
2261 cpc_readb(scabase + M_REG(ST4, ch))); in cpc_sca_status()
2263 cpc_readb(scabase + M_REG(CST0, ch)), in cpc_sca_status()
2264 cpc_readb(scabase + M_REG(CST1, ch)), in cpc_sca_status()
2265 cpc_readb(scabase + M_REG(CST2, ch)), in cpc_sca_status()
2266 cpc_readb(scabase + M_REG(CST3, ch)), in cpc_sca_status()
2267 cpc_readb(scabase + M_REG(FST, ch))); in cpc_sca_status()
2269 cpc_readb(scabase + M_REG(TRC0, ch)), in cpc_sca_status()
2270 cpc_readb(scabase + M_REG(TRC1, ch)), in cpc_sca_status()
2271 cpc_readb(scabase + M_REG(RRC, ch)), in cpc_sca_status()
2272 cpc_readb(scabase + M_REG(TBN, ch)), in cpc_sca_status()
2273 cpc_readb(scabase + M_REG(RBN, ch))); in cpc_sca_status()
2275 cpc_readb(scabase + M_REG(TFS, ch)), in cpc_sca_status()
2276 cpc_readb(scabase + M_REG(TNR0, ch)), in cpc_sca_status()
2277 cpc_readb(scabase + M_REG(TNR1, ch)), in cpc_sca_status()
2278 cpc_readb(scabase + M_REG(RNR, ch))); in cpc_sca_status()
2280 cpc_readb(scabase + M_REG(TCR, ch)), in cpc_sca_status()
2281 cpc_readb(scabase + M_REG(RCR, ch)), in cpc_sca_status()
2282 cpc_readb(scabase + M_REG(TNR1, ch)), in cpc_sca_status()
2283 cpc_readb(scabase + M_REG(RNR, ch))); in cpc_sca_status()
2285 cpc_readb(scabase + M_REG(TXS, ch)), in cpc_sca_status()
2286 cpc_readb(scabase + M_REG(RXS, ch)), in cpc_sca_status()
2287 cpc_readb(scabase + M_REG(EXS, ch)), in cpc_sca_status()
2288 cpc_readb(scabase + M_REG(TMCT, ch)), in cpc_sca_status()
2289 cpc_readb(scabase + M_REG(TMCR, ch))); in cpc_sca_status()
2291 cpc_readb(scabase + M_REG(IE0, ch)), in cpc_sca_status()
2292 cpc_readb(scabase + M_REG(IE1, ch)), in cpc_sca_status()
2293 cpc_readb(scabase + M_REG(IE2, ch)), in cpc_sca_status()
2294 cpc_readb(scabase + M_REG(IE4, ch)), in cpc_sca_status()
2295 cpc_readb(scabase + M_REG(FIE, ch))); in cpc_sca_status()
2306 void cpc_falc_status(pc300_t * card, int ch) in cpc_falc_status() argument
2308 pc300ch_t *chan = &card->chan[ch]; in cpc_falc_status()
2314 ch, (pfalc->sync ? "SYNC" : ""), (pfalc->active ? "ACTIVE" : ""), in cpc_falc_status()
2350 int ch = chan->channel; in cpc_ioctl() local
2406 cpc_sca_status(card, ch); in cpc_ioctl()
2409 cpc_falc_status(card, ch); in cpc_ioctl()
2424 pc300stats.line_on = card->chan[ch].d.line_on; in cpc_ioctl()
2425 pc300stats.line_off = card->chan[ch].d.line_off; in cpc_ioctl()
2451 !(cpc_readb (scabase + M_REG(ST3, ch)) & ST3_DCD); in cpc_ioctl()
2453 !(cpc_readb (scabase + M_REG(ST3, ch)) & ST3_CTS); in cpc_ioctl()
2455 !(cpc_readb (scabase + M_REG(CTL, ch)) & CTL_RTS); in cpc_ioctl()
2457 !(cpc_readb (scabase + M_REG(CTL, ch)) & CTL_DTR); in cpc_ioctl()
2485 falc_local_loop(card, ch, pc300loop.loop_on); in cpc_ioctl()
2489 falc_remote_loop(card, ch, pc300loop.loop_on); in cpc_ioctl()
2493 falc_payload_loop(card, ch, pc300loop.loop_on); in cpc_ioctl()
2498 falc_generate_loop_up_code (card, ch); in cpc_ioctl()
2500 turn_off_xlu(card, ch); in cpc_ioctl()
2506 falc_generate_loop_down_code (card, ch); in cpc_ioctl()
2508 turn_off_xld(card, ch); in cpc_ioctl()
2536 falc_pattern_test(card, ch, 1); in cpc_ioctl()
2539 falc_pattern_test_error(card, ch); in cpc_ioctl()
2545 falc_pattern_test(card, ch, pc300patrntst.patrntst_on); in cpc_ioctl()
2584 cpc_writeb(card->hw.scabase + M_REG(MD2, ch), in cpc_ioctl()
2585 cpc_readb(card->hw.scabase + M_REG(MD2, ch)) | in cpc_ioctl()
2609 cpc_writeb(card->hw.scabase + M_REG(MD2, ch), in cpc_ioctl()
2610 cpc_readb(card->hw.scabase + M_REG(MD2, ch)) | in cpc_ioctl()
2670 int ch = chan->channel; in ch_config() local
2679 cpc_writeb(scabase + M_REG(CMD, ch), CMD_CH_RST); in ch_config()
2718 cpc_writeb(scabase + M_REG(MD0, ch), md0); in ch_config()
2719 cpc_writeb(scabase + M_REG(MD1, ch), 0); in ch_config()
2720 cpc_writeb(scabase + M_REG(MD2, ch), md2); in ch_config()
2721 cpc_writeb(scabase + M_REG(IDL, ch), 0x7e); in ch_config()
2722 cpc_writeb(scabase + M_REG(CTL, ch), CTL_URSKP | CTL_IDLC); in ch_config()
2729 cpc_readl(plxbase + card->hw.gpioc_reg) | PC300_CHMEDIA_MASK(ch)); in ch_config()
2732 cpc_readl(plxbase + card->hw.gpioc_reg) & ~PC300_CHMEDIA_MASK(ch)); in ch_config()
2740 te_config(card, ch); in ch_config()
2750 cpc_writeb(scabase + M_REG(TMCT, ch), tmc); in ch_config()
2751 cpc_writeb(scabase + M_REG(TXS, ch), in ch_config()
2754 cpc_writeb(scabase + M_REG(TMCR, ch), tmc); in ch_config()
2755 cpc_writeb(scabase + M_REG(RXS, ch), in ch_config()
2758 cpc_writeb(scabase + M_REG(TMCR, ch), 1); in ch_config()
2759 cpc_writeb(scabase + M_REG(RXS, ch), 0); in ch_config()
2762 cpc_writeb(scabase + M_REG(GPO, ch), 1); in ch_config()
2763 cpc_writeb(scabase + M_REG(EXS, ch), EXS_TES1 | EXS_RES1); in ch_config()
2765 cpc_writeb(scabase + M_REG(EXS, ch), EXS_TES1); in ch_config()
2768 cpc_writeb(scabase + M_REG(TMCT, ch), 1); in ch_config()
2770 cpc_writeb(scabase + M_REG(TXS, ch), in ch_config()
2773 cpc_writeb(scabase + M_REG(TXS, ch), in ch_config()
2776 cpc_writeb(scabase + M_REG(TMCR, ch), 1); in ch_config()
2777 cpc_writeb(scabase + M_REG(RXS, ch), 0); in ch_config()
2779 cpc_writeb(scabase + M_REG(GPO, ch), 0); in ch_config()
2780 cpc_writeb(scabase + M_REG(EXS, ch), EXS_TES1 | EXS_RES1); in ch_config()
2782 cpc_writeb(scabase + M_REG(EXS, ch), EXS_TES1); in ch_config()
2789 cpc_writeb(scabase + M_REG(TMCT, ch), 1); in ch_config()
2790 cpc_writeb(scabase + M_REG(TXS, ch), 0); in ch_config()
2791 cpc_writeb(scabase + M_REG(TMCR, ch), 1); in ch_config()
2792 cpc_writeb(scabase + M_REG(RXS, ch), 0); in ch_config()
2793 cpc_writeb(scabase + M_REG(EXS, ch), 0); in ch_config()
2800 IR0_M(IR0_RXINTA, ch) | in ch_config()
2801 IR0_DRX(IR0_EFT | IR0_DMIA | IR0_DMIB, ch) | in ch_config()
2802 IR0_DTX(IR0_EFT | IR0_DMIA | IR0_DMIB, ch)); in ch_config()
2803 cpc_writeb(scabase + M_REG(IE0, ch), in ch_config()
2804 cpc_readl(scabase + M_REG(IE0, ch)) | IE0_RXINTA); in ch_config()
2805 cpc_writeb(scabase + M_REG(IE1, ch), in ch_config()
2806 cpc_readl(scabase + M_REG(IE1, ch)) | IE1_CDCD); in ch_config()
2816 int ch = chan->channel; in rx_config() local
2818 cpc_writeb(scabase + DSR_RX(ch), 0); in rx_config()
2821 cpc_writeb(scabase + M_REG(RRC, ch), 0); in rx_config()
2822 cpc_writeb(scabase + M_REG(RNR, ch), 16); in rx_config()
2825 cpc_writeb(scabase + M_REG(CMD, ch), CMD_RX_CRC_INIT); in rx_config()
2826 cpc_writeb(scabase + M_REG(CMD, ch), CMD_RX_ENA); in rx_config()
2831 rx_dma_buf_init(card, ch); in rx_config()
2832 cpc_writeb(scabase + DCR_RX(ch), DCR_FCT_CLR); in rx_config()
2833 cpc_writeb(scabase + DMR_RX(ch), (DMR_TMOD | DMR_NF)); in rx_config()
2834 cpc_writeb(scabase + DIR_RX(ch), (DIR_EOM | DIR_BOF)); in rx_config()
2837 rx_dma_start(card, ch); in rx_config()
2847 int ch = chan->channel; in tx_config() local
2849 cpc_writeb(scabase + DSR_TX(ch), 0); in tx_config()
2852 cpc_writeb(scabase + M_REG(TRC0, ch), 0); in tx_config()
2853 cpc_writeb(scabase + M_REG(TFS, ch), 32); in tx_config()
2854 cpc_writeb(scabase + M_REG(TNR0, ch), 20); in tx_config()
2855 cpc_writeb(scabase + M_REG(TNR1, ch), 48); in tx_config()
2856 cpc_writeb(scabase + M_REG(TCR, ch), 8); in tx_config()
2859 cpc_writeb(scabase + M_REG(CMD, ch), CMD_TX_CRC_INIT); in tx_config()
2864 tx_dma_buf_init(card, ch); in tx_config()
2865 cpc_writeb(scabase + DCR_TX(ch), DCR_FCT_CLR); in tx_config()
2866 cpc_writeb(scabase + DMR_TX(ch), (DMR_TMOD | DMR_NF)); in tx_config()
2867 cpc_writeb(scabase + DIR_TX(ch), (DIR_EOM | DIR_BOF | DIR_UDRF)); in tx_config()
2868 cpc_writel(scabase + DTX_REG(CDAL, ch), TX_BD_ADDR(ch, chan->tx_first_bd)); in tx_config()
2869 cpc_writel(scabase + DTX_REG(EDAL, ch), TX_BD_ADDR(ch, chan->tx_next_bd)); in tx_config()
2910 int ch = chan->channel; in cpc_opench() local
2920 cpc_writeb(scabase + M_REG(CTL, ch), in cpc_opench()
2921 cpc_readb(scabase + M_REG(CTL, ch)) & ~(CTL_RTS | CTL_DTR)); in cpc_opench()
2929 int ch = chan->channel; in cpc_closech() local
2931 cpc_writeb(card->hw.scabase + M_REG(CMD, ch), CMD_CH_RST); in cpc_closech()
2932 rx_dma_stop(card, ch); in cpc_closech()
2933 tx_dma_stop(card, ch); in cpc_closech()
2940 CPLD_REG2_FALC_LED2) << (2 * ch))); in cpc_closech()
2944 (CPLD_REG1_FALC_RESET << (2 * ch))); in cpc_closech()
2948 ~(CPLD_REG1_FALC_RESET << (2 * ch))); in cpc_closech()