Lines Matching refs:n
100 void set_tss_descriptor(unsigned int n, void *addr) in set_tss_descriptor() argument
105 …*(unsigned long *)(phys_2_virt(GDT_Table + n)) = (limit & 0xffff) | (((unsigned long)addr & 0xffff… in set_tss_descriptor()
106 …*(unsigned long *)(phys_2_virt(GDT_Table + n + 1)) = (((unsigned long)addr >> 32) & 0xffffffff) | … in set_tss_descriptor()
114 #define load_TR(n) \ argument
117 __asm__ __volatile__("ltr %%ax" ::"a"((n) << 3)); \
127 void set_intr_gate(unsigned int n, unsigned char ist, void *addr) in set_intr_gate() argument
129 _set_gate(phys_2_virt(IDT_Table + n), 0x8E, ist, addr); // p=1，DPL=0, type=E in set_intr_gate()
141 void set_trap_gate(unsigned int n, unsigned char ist, void *addr) in set_trap_gate() argument
146 _set_gate(phys_2_virt(IDT_Table + n), 0x8F, ist, addr); // p=1，DPL=0, type=F in set_trap_gate()
156 void set_system_trap_gate(unsigned int n, unsigned char ist, void *addr) in set_system_trap_gate() argument
161 _set_gate(phys_2_virt(IDT_Table + n), 0xEF, ist, addr); // p=1，DPL=3, type=F in set_system_trap_gate()
165 static inline void set_system_intr_gate(unsigned int n,unsigned char ist,void * addr) //int3 in set_system_intr_gate() argument
167 _set_gate(phys_2_virt(IDT_Table + n) , 0xEE , ist , addr); //P,DPL=3,TYPE=E in set_system_intr_gate()