112     class_code: u8,  in get_pci_device_structure_mut()  argument
113     subclass: u8,  in get_pci_device_structure_mut()  argument
131     class_code: u8,  in get_pci_device_structure()  argument
132     subclass: u8,  in get_pci_device_structure()  argument
145 const BAR0_OFFSET: u8 = 0x10;
147 const STATUS_COMMAND_OFFSET: u8 = 0x04;
149 pub const PCI_CAP_ID_VNDR: u8 = 0x09;
150 pub const PCI_CAP_ID_MSI: u8 = 0x05;
151 pub const PCI_CAP_ID_MSIX: u8 = 0x11;
224     Unrecognised(u8),
227 impl From<u8> for HeaderType {
228     fn from(value: u8) -> Self {  in from()
339     fn bar_ioremap(&mut self) -> Option<Result<u8, PciError>> {  in bar_ioremap()  argument
353     fn msix_capability_offset(&self) -> Option<u8> {  in msix_capability_offset()  argument
362     fn msi_capability_offset(&self) -> Option<u8> {  in msi_capability_offset()  argument
385     pub revision_id: u8, // 修订ID，指定特定设备的修订标志符
386     pub prog_if: u8, // 编程接口字节，一个只读寄存器，指定设备具有的寄存器级别的编程接口（如果有的话）
387     pub subclass: u8, // 子类。指定设备执行的特定功能的只读寄存器
388     pub class_code: u8, // 类代码，一个只读寄存器，指定设备执行的功能类型
389 …pub cache_line_size: u8, // 缓存线大小：以 32 位为单位指定系统缓存线大小。设备可以限制它可以支持的缓存线大小的数量，如果不支持的值写入该字段，设备将表现得好像写入了…
390     pub latency_timer: u8,   // 延迟计时器：以 PCI 总线时钟为单位指定延迟计时器。
391 …pub header_type: u8, // 标头类型 a value of 0x0 specifies a general device, a value of 0x1 specifies a…
392 … pub bist: u8, // Represents that status and allows control of a devices BIST (built-in self test).
412     pub capabilities_pointer: u8,
413     pub reserved0: u8,
416 …pub interrupt_line: u8, // 指定设备的中断引脚连接到系统中断控制器的哪个输入，并由任何使用中断引脚的设备实现。对于 x86 架构，此寄存器对应于 PIC IRQ 编号 0…
417     pub interrupt_pin: u8, // 指定设备使用的中断引脚。其中值为0x1INTA#、0x2INTB#、0x3INTC#、0x4INTD#，0x0表示设备不使用中断引脚。
418     pub min_grant: u8, // 一个只读寄存器，用于指定设备所需的突发周期长度（以 1/4 微秒为单位）（假设时钟速率为 33 MHz）
419     pub max_latency: u8, // 一个只读寄存器，指定设备需要多长时间访问一次 PCI 总线（以 1/4 微秒为单位）。
448     fn bar_ioremap(&mut self) -> Option<Result<u8, PciError>> {  in bar_ioremap()  argument
481     pub primary_bus_number: u8,
482     pub secondary_bus_number: u8,
483     pub subordinate_bus_number: u8,
484     pub secondary_latency_timer: u8,
485     pub io_base: u8,
486     pub io_limit: u8,
496     pub capability_pointer: u8,
497     pub reserved0: u8,
500     pub interrupt_line: u8,
501     pub interrupt_pin: u8,
539     pub offset_of_capabilities_list: u8,
540     pub reserved: u8,
542     pub pci_bus_number: u8,
543     pub card_bus_bus_number: u8,
544     pub subordinate_bus_number: u8,
545     pub card_bus_latency_timer: u8,
554     pub interrupt_line: u8,
555     pub interrupt_pin: u8,
600     pub bus_begin: u8,                             //该分组中的最小bus
601     pub bus_end: u8,                               //该分组中的最大bus
627     fn map(&mut self) -> Result<u8, PciError> {  in map()  argument
722 pub fn capabilities_offset(bus_device_function: BusDeviceFunction) -> Option<u8> {  in capabilities_offset()  argument
726         let cap_pointer = PciArch::read_config(&bus_device_function, 0x34) as u8 & 0xFC;  in capabilities_offset()
751     let revision_id = result as u8;  in pci_read_header()
752     let prog_if = (result >> 8) as u8;  in pci_read_header()
753     let subclass = (result >> 16) as u8;  in pci_read_header()
754     let class_code = (result >> 24) as u8;  in pci_read_header()
757     let cache_line_size = result as u8;  in pci_read_header()
758     let latency_timer = (result >> 8) as u8;  in pci_read_header()
759     let header_type = (result >> 16) as u8;  in pci_read_header()
760     let bist = (result >> 24) as u8;  in pci_read_header()
831     let capabilities_pointer = result as u8;  in pci_read_general_device_header()
832     let reserved0 = (result >> 8) as u8;  in pci_read_general_device_header()
838     let interrupt_line = result as u8;  in pci_read_general_device_header()
839     let interrupt_pin = (result >> 8) as u8;  in pci_read_general_device_header()
840     let min_grant = (result >> 16) as u8;  in pci_read_general_device_header()
841     let max_latency = (result >> 24) as u8;  in pci_read_general_device_header()
876     let primary_bus_number = result as u8;  in pci_read_pci_to_pci_bridge_header()
877     let secondary_bus_number = (result >> 8) as u8;  in pci_read_pci_to_pci_bridge_header()
878     let subordinate_bus_number = (result >> 16) as u8;  in pci_read_pci_to_pci_bridge_header()
879     let secondary_latency_timer = (result >> 24) as u8;  in pci_read_pci_to_pci_bridge_header()
882     let io_base = result as u8;  in pci_read_pci_to_pci_bridge_header()
883     let io_limit = (result >> 8) as u8;  in pci_read_pci_to_pci_bridge_header()
902     let capability_pointer = result as u8;  in pci_read_pci_to_pci_bridge_header()
903     let reserved0 = (result >> 8) as u8;  in pci_read_pci_to_pci_bridge_header()
909     let interrupt_line = result as u8;  in pci_read_pci_to_pci_bridge_header()
910     let interrupt_pin = (result >> 8) as u8;  in pci_read_pci_to_pci_bridge_header()
955     let offset_of_capabilities_list = result as u8;  in pci_read_pci_to_cardbus_bridge_header()
956     let reserved = (result >> 8) as u8;  in pci_read_pci_to_cardbus_bridge_header()
960     let pci_bus_number = result as u8;  in pci_read_pci_to_cardbus_bridge_header()
961     let card_bus_bus_number = (result >> 8) as u8;  in pci_read_pci_to_cardbus_bridge_header()
962     let subordinate_bus_number = (result >> 16) as u8;  in pci_read_pci_to_cardbus_bridge_header()
963     let card_bus_latency_timer = (result >> 24) as u8;  in pci_read_pci_to_cardbus_bridge_header()
975     let interrupt_line = result as u8;  in pci_read_pci_to_cardbus_bridge_header()
976     let interrupt_pin = (result >> 8) as u8;  in pci_read_pci_to_cardbus_bridge_header()
1013 fn pci_check_all_buses() -> Result<u8, PciError> {  in pci_check_all_buses()
1032 fn pci_check_function(busdevicefunction: BusDeviceFunction) -> Result<u8, PciError> {  in pci_check_function()  argument
1058 fn pci_check_device(bus: u8, device: u8) -> Result<u8, PciError> {  in pci_check_device()  argument
1097 fn pci_check_bus(bus: u8) -> Result<u8, PciError> {  in pci_check_bus()  argument
1178     pub bus: u8,
1180     pub device: u8,
1182     pub function: u8,
1216 impl From<MemoryBarType> for u8 {  implementation
1226 impl TryFrom<u8> for MemoryBarType {
1228     fn try_from(value: u8) -> Result<Self, Self::Error> {  in try_from()
1332     pub fn get_bar(&self, bar_index: u8) -> Result<&BarInfo, PciError> {  in get_bar()
1375     let mut bar_index_ignore: u8 = 255;  in pci_bar_init()
1406             let address_type = MemoryBarType::try_from(((bar_orig & 0x00000006) >> 1) as u8)?;  in pci_bar_init()
1489     pub offset: u8,
1491     pub id: u8,
1501     pub next_capability_offset: Option<u8>,
1511         let id = capability_header as u8;  in next()
1512         let next_offset = (capability_header >> 8) as u8;  in next()
1541     pub capability_version: u8,
1561         let capability_version = ((capability_header >> 16) & 0xf) as u8;  in next()