327             &common_header.bus_device_function,  in set_command()
380     pub bus_device_function: BusDeviceFunction,  field
444             bus_device_function: self.common_header.bus_device_function,  in capabilities()
450         match pci_bar_init(common_header.bus_device_function) {  in bar_ioremap()
666     fn cam_offset(&self, bus_device_function: BusDeviceFunction, register_offset: u16) -> u32 {  in cam_offset()
667         assert!(bus_device_function.valid());  in cam_offset()
668         let bdf = ((bus_device_function.bus - self.bus_begin) as u32) << 8  in cam_offset()
669             | (bus_device_function.device as u32) << 3  in cam_offset()
670             | bus_device_function.function as u32;  in cam_offset()
680     pub fn read_config(&self, bus_device_function: BusDeviceFunction, register_offset: u16) -> u32 {  in read_config()
681         let address = self.cam_offset(bus_device_function, register_offset);  in read_config()
694         bus_device_function: BusDeviceFunction,  in write_config()
698         let address = self.cam_offset(bus_device_function, register_offset);  in write_config()
709         bus_device_function: BusDeviceFunction,  in external_capabilities()
713             bus_device_function,  in external_capabilities()
722 pub fn capabilities_offset(bus_device_function: BusDeviceFunction) -> Option<u8> {  in capabilities_offset()
723     let result = PciArch::read_config(&bus_device_function, STATUS_COMMAND_OFFSET);  in capabilities_offset()
726         let cap_pointer = PciArch::read_config(&bus_device_function, 0x34) as u8 & 0xFC;  in capabilities_offset()
738     bus_device_function: BusDeviceFunction,  in pci_read_header()
742     let result = PciArch::read_config(&bus_device_function, 0x00);  in pci_read_header()
746     let result = PciArch::read_config(&bus_device_function, 0x04);  in pci_read_header()
750     let result = PciArch::read_config(&bus_device_function, 0x08);  in pci_read_header()
756     let result = PciArch::read_config(&bus_device_function, 0x0c);  in pci_read_header()
765         bus_device_function,  in pci_read_header()
781             let general_device = pci_read_general_device_header(header, &bus_device_function);  in pci_read_header()
790             let pci_to_pci_bridge = pci_read_pci_to_pci_bridge_header(header, &bus_device_function);  in pci_read_header()
800                 pci_read_pci_to_cardbus_bridge_header(header, &bus_device_function);  in pci_read_header()
819     bus_device_function: &BusDeviceFunction,  in pci_read_general_device_header()
822     let cardbus_cis_pointer = PciArch::read_config(bus_device_function, 0x28);  in pci_read_general_device_header()
824     let result = PciArch::read_config(bus_device_function, 0x2c);  in pci_read_general_device_header()
828     let expansion_rom_base_address = PciArch::read_config(bus_device_function, 0x30);  in pci_read_general_device_header()
830     let result = PciArch::read_config(bus_device_function, 0x34);  in pci_read_general_device_header()
835     let reserved2 = PciArch::read_config(bus_device_function, 0x38);  in pci_read_general_device_header()
837     let result = PciArch::read_config(bus_device_function, 0x3c);  in pci_read_general_device_header()
869     bus_device_function: &BusDeviceFunction,  in pci_read_pci_to_pci_bridge_header()
871     let bar0 = PciArch::read_config(bus_device_function, 0x10);  in pci_read_pci_to_pci_bridge_header()
872     let bar1 = PciArch::read_config(bus_device_function, 0x14);  in pci_read_pci_to_pci_bridge_header()
874     let result = PciArch::read_config(bus_device_function, 0x18);  in pci_read_pci_to_pci_bridge_header()
881     let result = PciArch::read_config(bus_device_function, 0x1c);  in pci_read_pci_to_pci_bridge_header()
886     let result = PciArch::read_config(bus_device_function, 0x20);  in pci_read_pci_to_pci_bridge_header()
890     let result = PciArch::read_config(bus_device_function, 0x24);  in pci_read_pci_to_pci_bridge_header()
894     let prefetchable_base_upper_32_bits = PciArch::read_config(bus_device_function, 0x28);  in pci_read_pci_to_pci_bridge_header()
895     let prefetchable_limit_upper_32_bits = PciArch::read_config(bus_device_function, 0x2c);  in pci_read_pci_to_pci_bridge_header()
897     let result = PciArch::read_config(bus_device_function, 0x30);  in pci_read_pci_to_pci_bridge_header()
901     let result = PciArch::read_config(bus_device_function, 0x34);  in pci_read_pci_to_pci_bridge_header()
906     let expansion_rom_base_address = PciArch::read_config(bus_device_function, 0x38);  in pci_read_pci_to_pci_bridge_header()
908     let result = PciArch::read_config(bus_device_function, 0x3c);  in pci_read_pci_to_pci_bridge_header()
1138 …lities_pointer,common_header.vendor_id, common_header.device_id,common_header.bus_device_function);  in pci_init()
1372     bus_device_function: BusDeviceFunction,  in pci_bar_init()
1382         let bar_orig = PciArch::read_config(&bus_device_function, BAR0_OFFSET + 4 * bar_index);  in pci_bar_init()
1384             &bus_device_function,  in pci_bar_init()
1388         let size_mask = PciArch::read_config(&bus_device_function, BAR0_OFFSET + 4 * bar_index);  in pci_bar_init()
1394         PciArch::write_config(&bus_device_function, BAR0_OFFSET + 4 * bar_index, bar_orig);  in pci_bar_init()
1412                     PciArch::read_config(&bus_device_function, BAR0_OFFSET + 4 * (bar_index + 1));  in pci_bar_init()
1500     pub bus_device_function: BusDeviceFunction,  field
1510         let capability_header = PciArch::read_config(&self.bus_device_function, offset);  in next()
1549     pub bus_device_function: BusDeviceFunction,  field
1558         let capability_header = self.root.read_config(self.bus_device_function, offset);  in next()