History log of /DragonOS/kernel/src/arch/riscv64/interrupt/mod.rs (Results 1 – 11 of 11)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
# 0102d69f 01-May-2024 LoGin <longjin@DragonOS.org>

feat:(riscv/intr) 实现riscv plic驱动,能处理外部中断 (#799)

* feat:(riscv/intr) 实现riscv plic驱动,能处理外部中断

- 实现riscv plic驱动,能处理外部中断
- 能收到virtio-blk的中断
- 实现fasteoi interrupt handler


# 9621ab16 14-Apr-2024 LoGin <longjin@DragonOS.org>

让riscv64能正常切换进程,并运行完所有的initcall (#721)


# e8eab1ac 05-Apr-2024 LoGin <longjin@DragonOS.org>

riscv: copy-thread (#696)


# 9b96c5b5 31-Mar-2024 LoGin <longjin@DragonOS.org>

riscv64: switch process (#678)

* riscv64: switch process

* fixname


# b5b571e0 22-Mar-2024 LoGin <longjin@DragonOS.org>

修复内核的clippy检查报错 (#637)

修复内核的clippy检查报错
---------

Co-authored-by: Samuel Dai <947309196@qq.com>
Co-authored-by: Donkey Kane <109840258+xiaolin2004@users.noreply.github.com>
Co-authored-by: them

修复内核的clippy检查报错 (#637)

修复内核的clippy检查报错
---------

Co-authored-by: Samuel Dai <947309196@qq.com>
Co-authored-by: Donkey Kane <109840258+xiaolin2004@users.noreply.github.com>
Co-authored-by: themildwind <107623059+themildwind@users.noreply.github.com>
Co-authored-by: GnoCiYeH <heyicong@dragonos.org>
Co-authored-by: MemoryShore <105195940+MemoryShore@users.noreply.github.com>
Co-authored-by: 曾俊 <110876916+ZZJJWarth@users.noreply.github.com>
Co-authored-by: sun5etop <146408999+sun5etop@users.noreply.github.com>
Co-authored-by: hmt <114841534+1037827920@users.noreply.github.com>
Co-authored-by: laokengwt <143977175+laokengwt@users.noreply.github.com>
Co-authored-by: TTaq <103996388+TTaq@users.noreply.github.com>
Co-authored-by: Jomo <2512364506@qq.com>
Co-authored-by: Samuel Dai <samuka007@qq.com>
Co-authored-by: sspphh <112558065+sspphh@users.noreply.github.com>

show more ...


Revision tags: V0.1.9
# 5c4224e5 08-Mar-2024 LoGin <longjin@DragonOS.org>

在riscv上实现异常处理,能够进入异常处理程序 (#564)


# 338f6903 05-Mar-2024 LoGin <longjin@DragonOS.org>

`riscv`: 初始化irq (#560)

完成riscv的irqchip初始化的代码。

这是该功能的第一个PR。由于还需要实现timer驱动才能测试,因此该功能将会通过2~3个PR来完成。


# 3bc96fa4 18-Feb-2024 LoGin <longjin@DragonOS.org>

添加irqdesc的抽象,并在系统初始化时创建irqdesc (#522)

* 添加irqdesc的抽象,并在系统初始化时创建irqdesc


# f2022a8a 07-Feb-2024 LoGin <longjin@DragonOS.org>

使用rust编写中断/异常的入口 (#509)

* 使用rust编写中断/异常的入口


# 7a29d4fc 21-Jan-2024 LoGin <longjin@DragonOS.org>

riscv64: 映射uefi systemtable,并完善了riscv64页表填写的部分内容 (#498)

* 从fdt的chosen段获取几个需要的字段

* merge patch-early-ioremap

* feature: 增加early io remap的fixmap功能

允许在内存管理初始化之前,使用fixmap功能,映射一些物理内存,并记录.

* r

riscv64: 映射uefi systemtable,并完善了riscv64页表填写的部分内容 (#498)

* 从fdt的chosen段获取几个需要的字段

* merge patch-early-ioremap

* feature: 增加early io remap的fixmap功能

允许在内存管理初始化之前,使用fixmap功能,映射一些物理内存,并记录.

* riscv64: 映射uefi systemtable,并完善了riscv64页表填写的部分内容

* 更新仓库网址

show more ...


# 4fda81ce 25-Nov-2023 LoGin <longjin@DragonOS.org>

使得DragonOS kernel 能为riscv64编译通过(尚未能启动) (#457)

* 使得DragonOS kernel 能为riscv64编译通过(尚未能启动)

* 修正了系统调用号声明不正确的问题,同时添加了编译配置文档